Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #define ASSEMBLY 1 |
Myles Watson | 1d6d45e | 2009-11-06 17:02:51 +0000 | [diff] [blame] | 21 | #define __PRE_RAM__ |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 22 | |
| 23 | #define RAMINIT_SYSINFO 1 |
| 24 | #define K8_SET_FIDVID 1 |
| 25 | #define QRANK_DIMM_SUPPORT 1 |
| 26 | #if CONFIG_LOGICAL_CPUS==1 |
| 27 | #define SET_NB_CFG_54 1 |
| 28 | #endif |
| 29 | |
| 30 | #define DIMM0 0x50 |
| 31 | #define DIMM1 0x51 |
| 32 | |
| 33 | #include <stdint.h> |
Patrick Georgi | 12aba82 | 2009-04-30 07:07:22 +0000 | [diff] [blame] | 34 | #include <string.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 35 | #include <device/pci_def.h> |
| 36 | #include <arch/io.h> |
| 37 | #include <device/pnp_def.h> |
| 38 | #include <arch/romcc_io.h> |
| 39 | #include <cpu/x86/lapic.h> |
| 40 | #include "option_table.h" |
| 41 | #include "pc80/mc146818rtc_early.c" |
| 42 | #include "pc80/serial.c" |
| 43 | #include "arch/i386/lib/console.c" |
| 44 | |
| 45 | #define post_code(x) outb(x, 0x80) |
| 46 | |
| 47 | #include <cpu/amd/model_fxx_rev.h> |
| 48 | #include "northbridge/amd/amdk8/raminit.h" |
| 49 | #include "cpu/amd/model_fxx/apic_timer.c" |
| 50 | #include "lib/delay.c" |
| 51 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 52 | #include "cpu/x86/lapic/boot_cpu.c" |
| 53 | #include "northbridge/amd/amdk8/reset_test.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 54 | #include "superio/ite/it8712f/it8712f_early_serial.c" |
| 55 | |
| 56 | #include "cpu/amd/mtrr/amd_earlymtrr.c" |
| 57 | #include "cpu/x86/bist.h" |
| 58 | |
| 59 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
| 60 | |
| 61 | #include "southbridge/amd/rs690/rs690_early_setup.c" |
| 62 | #include "southbridge/amd/sb600/sb600_early_setup.c" |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 63 | #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */ |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 64 | |
| 65 | /* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/ |
| 66 | static void memreset(int controllers, const struct mem_controller *ctrl) |
| 67 | { |
| 68 | } |
| 69 | |
| 70 | /* called in raminit_f.c */ |
| 71 | static inline void activate_spd_rom(const struct mem_controller *ctrl) |
| 72 | { |
| 73 | } |
| 74 | |
| 75 | /*called in raminit_f.c */ |
| 76 | static inline int spd_read_byte(u32 device, u32 address) |
| 77 | { |
| 78 | return smbus_read_byte(device, address); |
| 79 | } |
| 80 | |
| 81 | #include "northbridge/amd/amdk8/amdk8.h" |
| 82 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
Myles Watson | 1725703 | 2009-06-04 20:18:42 +0000 | [diff] [blame] | 83 | #include "northbridge/amd/amdk8/raminit_f.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 84 | #include "northbridge/amd/amdk8/coherent_ht.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 85 | #include "lib/generic_sdram.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 86 | #include "resourcemap.c" |
| 87 | |
| 88 | #include "cpu/amd/dualcore/dualcore.c" |
| 89 | |
| 90 | #include "cpu/amd/car/copy_and_run.c" |
| 91 | #include "cpu/amd/car/post_cache_as_ram.c" |
| 92 | |
| 93 | #include "cpu/amd/model_fxx/init_cpus.c" |
| 94 | |
| 95 | #include "cpu/amd/model_fxx/fidvid.c" |
| 96 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 97 | #include "northbridge/amd/amdk8/early_ht.c" |
| 98 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 99 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 100 | { |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 101 | static const u16 spd_addr[] = { DIMM0, 0, 0, 0, DIMM1, 0, 0, 0, }; |
| 102 | int needs_reset = 0; |
| 103 | u32 bsp_apicid = 0; |
| 104 | msr_t msr; |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 105 | struct cpuid_result cpuid1; |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 106 | struct sys_info *sysinfo = |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 107 | (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - |
| 108 | CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 109 | |
Patrick Georgi | 2bd9100 | 2010-03-18 16:46:50 +0000 | [diff] [blame^] | 110 | if (!cpu_init_detectedx && boot_cpu()) { |
Patrick Georgi | 776b85b | 2010-03-18 16:18:58 +0000 | [diff] [blame] | 111 | /* Nothing special needs to be done to find bus 0 */ |
| 112 | /* Allow the HT devices to be found */ |
| 113 | enumerate_ht_chain(); |
| 114 | |
| 115 | sb600_lpc_port80(); |
| 116 | /* sb600_pci_port80(); */ |
| 117 | } |
| 118 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 119 | if (bist == 0) { |
| 120 | bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); |
| 121 | } |
| 122 | |
| 123 | enable_rs690_dev8(); |
| 124 | sb600_lpc_init(); |
| 125 | |
| 126 | /* Pistachio used a FPGA to enable serial debug instead of a SIO |
| 127 | * and it doens't require any special setup. */ |
| 128 | uart_init(); |
| 129 | console_init(); |
| 130 | |
| 131 | post_code(0x03); |
| 132 | |
| 133 | /* Halt if there was a built in self test failure */ |
| 134 | report_bist_failure(bist); |
| 135 | printk_debug("bsp_apicid=0x%x\n", bsp_apicid); |
| 136 | |
| 137 | setup_pistachio_resource_map(); |
| 138 | |
| 139 | setup_coherent_ht_domain(); |
| 140 | |
| 141 | #if CONFIG_LOGICAL_CPUS==1 |
| 142 | /* It is said that we should start core1 after all core0 launched */ |
| 143 | wait_all_core0_started(); |
| 144 | start_other_cores(); |
| 145 | #endif |
| 146 | wait_all_aps_started(bsp_apicid); |
| 147 | |
| 148 | /* it will set up chains and store link pair for optimization later, |
| 149 | * it will init sblnk and sbbusn, nodes, sbdn */ |
| 150 | ht_setup_chains_x(sysinfo); |
| 151 | |
| 152 | /* run _early_setup before soft-reset. */ |
| 153 | rs690_early_setup(); |
| 154 | sb600_early_setup(); |
| 155 | |
| 156 | post_code(0x04); |
| 157 | |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 158 | /* Check to see if processor is capable of changing FIDVID */ |
| 159 | /* otherwise it will throw a GP# when reading FIDVID_STATUS */ |
| 160 | cpuid1 = cpuid(0x80000007); |
| 161 | if( (cpuid1.edx & 0x6) == 0x6 ) { |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 162 | |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 163 | /* Read FIDVID_STATUS */ |
| 164 | msr=rdmsr(0xc0010042); |
| 165 | printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 166 | |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 167 | enable_fid_change(); |
| 168 | enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); |
| 169 | init_fidvid_bsp(bsp_apicid); |
| 170 | |
| 171 | /* show final fid and vid */ |
| 172 | msr=rdmsr(0xc0010042); |
| 173 | printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); |
| 174 | |
| 175 | } else { |
| 176 | printk_debug("Changing FIDVID not supported\n"); |
| 177 | } |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 178 | |
| 179 | post_code(0x05); |
| 180 | |
| 181 | needs_reset = optimize_link_coherent_ht(); |
| 182 | needs_reset |= optimize_link_incoherent_ht(sysinfo); |
Carl-Daniel Hailfinger | 33f9633 | 2008-12-23 17:20:46 +0000 | [diff] [blame] | 183 | rs690_htinit(); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 184 | printk_debug("needs_reset=0x%x\n", needs_reset); |
| 185 | |
| 186 | post_code(0x06); |
| 187 | |
| 188 | if (needs_reset) { |
| 189 | print_info("ht reset -\r\n"); |
| 190 | soft_reset(); |
| 191 | } |
| 192 | |
| 193 | allow_all_aps_stop(bsp_apicid); |
| 194 | |
| 195 | /* It's the time to set ctrl now; */ |
| 196 | printk_debug("sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n", |
| 197 | sysinfo->nodes, sysinfo->ctrl, spd_addr); |
| 198 | fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); |
| 199 | |
| 200 | post_code(0x07); |
| 201 | |
| 202 | sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); |
| 203 | |
| 204 | post_code(0x08); |
| 205 | |
| 206 | rs690_before_pci_init(); |
| 207 | sb600_before_pci_init(); |
| 208 | |
| 209 | post_cache_as_ram(); |
| 210 | } |