Felix Held | 3f3eca9 | 2020-01-23 17:12:32 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 2 | |
| 3 | #include <arch/io.h> |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 4 | #include <console/console.h> |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 5 | #include <device/device.h> |
| 6 | #include <device/pnp.h> |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 7 | #include <option.h> |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 8 | #include <pc80/keyboard.h> |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 9 | #include <superio/conf_mode.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 10 | #include <acpi/acpi.h> |
| 11 | #include <acpi/acpigen.h> |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 12 | #include <superio/common/ssdt.h> |
| 13 | #include <stdlib.h> |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 14 | |
| 15 | #include "npcd378.h" |
| 16 | |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 17 | uint8_t npcd378_hwm_read(const uint16_t iobase, const uint16_t reg) |
| 18 | { |
| 19 | outb((reg >> 8) & 0xf, iobase + 0xff); |
| 20 | uint8_t reg8 = inb(iobase + (reg & 0xff)); |
| 21 | if (reg8 == 0xff) |
| 22 | reg8 = inb(iobase + (reg & 0xff)); |
| 23 | |
| 24 | outb(0, iobase + 0xff); |
| 25 | return reg8; |
| 26 | } |
| 27 | |
Elyes HAOUAS | 7774de5 | 2020-03-30 16:46:18 +0200 | [diff] [blame] | 28 | void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val) |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 29 | { |
| 30 | outb((reg >> 8) & 0xf, iobase + 0xff); |
| 31 | outb(val, iobase + (reg & 0xff)); |
| 32 | |
| 33 | outb(0, iobase + 0xff); |
| 34 | } |
| 35 | |
| 36 | void npcd378_hwm_write_start(const uint16_t iobase) |
| 37 | { |
| 38 | u8 reg8 = npcd378_hwm_read(iobase, NPCD837_HWM_WRITE_LOCK_CTRL); |
| 39 | reg8 &= ~NPCD837_HWM_WRITE_LOCK_BIT; |
| 40 | npcd378_hwm_write(iobase, NPCD837_HWM_WRITE_LOCK_CTRL, reg8); |
| 41 | } |
| 42 | |
| 43 | void npcd378_hwm_write_finished(const uint16_t iobase) |
| 44 | { |
| 45 | u8 reg8 = npcd378_hwm_read(iobase, NPCD837_HWM_WRITE_LOCK_CTRL); |
| 46 | reg8 |= NPCD837_HWM_WRITE_LOCK_BIT; |
| 47 | npcd378_hwm_write(iobase, NPCD837_HWM_WRITE_LOCK_CTRL, reg8); |
| 48 | } |
| 49 | |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 50 | static void npcd378_init(struct device *dev) |
| 51 | { |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 52 | struct resource *res; |
| 53 | uint8_t pwm, fan_lvl; |
| 54 | |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 55 | if (!dev->enabled) |
| 56 | return; |
| 57 | |
| 58 | switch (dev->path.pnp.device) { |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 59 | /* TODO: Might potentially need code for FDC etc. */ |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 60 | case NPCD378_KBC: |
| 61 | pc_keyboard_init(PROBE_AUX_DEVICE); |
| 62 | break; |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 63 | case NPCD378_HWM: |
| 64 | res = find_resource(dev, PNP_IDX_IO0); |
| 65 | if (!res || !res->base) { |
Elyes HAOUAS | 7774de5 | 2020-03-30 16:46:18 +0200 | [diff] [blame] | 66 | printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n", NPCD378_HWM); |
Patrick Rudolph | 9bd6015 | 2018-05-04 09:01:38 +0200 | [diff] [blame] | 67 | break; |
| 68 | } |
| 69 | |
| 70 | npcd378_hwm_write_start(res->base); |
| 71 | |
| 72 | if (!get_option(&fan_lvl, "psu_fan_lvl") || fan_lvl > 7) |
| 73 | fan_lvl = 3; |
| 74 | |
| 75 | pwm = NPCD378_HWM_PSU_FAN_MIN + |
| 76 | (NPCD378_HWM_PSU_FAN_MAX - NPCD378_HWM_PSU_FAN_MIN) * |
| 77 | fan_lvl / 7; |
| 78 | |
| 79 | /* Set PSU fan PWM lvl */ |
| 80 | npcd378_hwm_write(res->base, NPCD378_HWM_PSU_FAN_PWM_CTRL, pwm); |
| 81 | printk(BIOS_INFO, "NPCD378: PSU fan PWM 0x%02x\n", pwm); |
| 82 | |
| 83 | npcd378_hwm_write_finished(res->base); |
| 84 | break; |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 85 | } |
| 86 | } |
| 87 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 88 | #if CONFIG(HAVE_ACPI_TABLES) |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 89 | /* Provide ACPI HIDs for generic Super I/O SSDT */ |
| 90 | static const char *npcd378_acpi_hid(const struct device *dev) |
Patrick Rudolph | 9ae150a | 2018-07-17 11:41:10 +0200 | [diff] [blame] | 91 | { |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 92 | /* Sanity checks */ |
| 93 | if (dev->path.type != DEVICE_PATH_PNP) |
| 94 | return NULL; |
| 95 | if (dev->path.pnp.port == 0) |
| 96 | return NULL; |
| 97 | if ((dev->path.pnp.device & 0xff) > NPCD378_GPIOA) |
| 98 | return NULL; |
Patrick Rudolph | 9ae150a | 2018-07-17 11:41:10 +0200 | [diff] [blame] | 99 | |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 100 | switch (dev->path.pnp.device & 0xff) { |
| 101 | case NPCD378_FDC: |
| 102 | return ACPI_HID_FDC; |
| 103 | case NPCD378_PP: |
| 104 | return ACPI_HID_LPT; |
| 105 | case NPCD378_SP1: /* fallthrough */ |
| 106 | case NPCD378_SP2: |
| 107 | return ACPI_HID_COM; |
| 108 | case NPCD378_AUX: |
| 109 | return ACPI_HID_MOUSE; |
| 110 | case NPCD378_KBC: |
| 111 | return ACPI_HID_KEYBOARD; |
| 112 | default: |
| 113 | return ACPI_HID_PNP; |
Patrick Rudolph | 9ae150a | 2018-07-17 11:41:10 +0200 | [diff] [blame] | 114 | } |
| 115 | } |
| 116 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 117 | static void npcd378_ssdt_aux(const struct device *dev) |
Patrick Rudolph | 9ae150a | 2018-07-17 11:41:10 +0200 | [diff] [blame] | 118 | { |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 119 | /* Scope */ |
| 120 | acpigen_write_scope(acpi_device_path(dev)); |
| 121 | |
| 122 | acpigen_write_method("_PSW", 1); |
| 123 | acpigen_write_store(); |
| 124 | acpigen_emit_byte(ARG0_OP); |
| 125 | acpigen_emit_namestring("^^MSFG"); |
| 126 | acpigen_pop_len(); /* Pop Method */ |
| 127 | |
| 128 | acpigen_write_PRW(8, 3); |
| 129 | |
| 130 | acpigen_pop_len(); /* Pop Scope */ |
| 131 | } |
| 132 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 133 | static void npcd378_ssdt_kbc(const struct device *dev) |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 134 | { |
| 135 | /* Scope */ |
| 136 | acpigen_write_scope(acpi_device_path(dev)); |
| 137 | |
| 138 | acpigen_write_method("_PSW", 1); |
| 139 | acpigen_write_store(); |
| 140 | acpigen_emit_byte(ARG0_OP); |
| 141 | acpigen_emit_namestring("^^KBFG"); |
| 142 | acpigen_pop_len(); /* Pop Method */ |
| 143 | |
| 144 | acpigen_write_PRW(8, 3); |
| 145 | |
| 146 | acpigen_pop_len(); /* Pop Scope */ |
| 147 | } |
| 148 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 149 | static void npcd378_ssdt_pwr(const struct device *dev) |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 150 | { |
| 151 | const char *name = acpi_device_path(dev); |
| 152 | const char *scope = acpi_device_scope(dev); |
| 153 | char *tmp_name; |
| 154 | |
| 155 | /* Scope */ |
| 156 | acpigen_write_scope(name); |
| 157 | |
| 158 | acpigen_emit_ext_op(OPREGION_OP); |
| 159 | acpigen_emit_namestring("SWCR"); |
| 160 | acpigen_emit_byte(SYSTEMIO); |
| 161 | acpigen_emit_namestring("IO0B"); |
| 162 | acpigen_emit_namestring("IO0S"); |
| 163 | |
| 164 | struct fieldlist l1[] = { |
| 165 | FIELDLIST_OFFSET(0), |
| 166 | FIELDLIST_NAMESTR("LEDC", 8), |
| 167 | FIELDLIST_NAMESTR("SWCC", 8), |
| 168 | }; |
| 169 | |
| 170 | acpigen_write_field("SWCR", l1, ARRAY_SIZE(l1), FIELD_BYTEACC | |
| 171 | FIELD_NOLOCK | FIELD_PRESERVE); |
| 172 | |
| 173 | acpigen_emit_ext_op(OPREGION_OP); |
| 174 | acpigen_emit_namestring("RNTR"); |
| 175 | acpigen_emit_byte(SYSTEMIO); |
| 176 | acpigen_emit_namestring("IO1B"); |
| 177 | acpigen_emit_namestring("IO1S"); |
| 178 | |
| 179 | struct fieldlist l2[] = { |
| 180 | FIELDLIST_OFFSET(0), |
| 181 | FIELDLIST_NAMESTR("GPES", 8), |
| 182 | FIELDLIST_NAMESTR("GPEE", 8), |
| 183 | FIELDLIST_OFFSET(8), |
| 184 | FIELDLIST_NAMESTR("GPS0", 8), |
| 185 | FIELDLIST_NAMESTR("GPS1", 8), |
| 186 | FIELDLIST_NAMESTR("GPS2", 8), |
| 187 | FIELDLIST_NAMESTR("GPS3", 8), |
| 188 | FIELDLIST_NAMESTR("GPE0", 8), |
| 189 | FIELDLIST_NAMESTR("GPE1", 8), |
| 190 | FIELDLIST_NAMESTR("GPE2", 8), |
| 191 | FIELDLIST_NAMESTR("GPE3", 8), |
| 192 | }; |
| 193 | |
| 194 | acpigen_write_field("RNTR", l2, ARRAY_SIZE(l2), FIELD_BYTEACC | |
| 195 | FIELD_NOLOCK | FIELD_PRESERVE); |
| 196 | |
| 197 | /* Method (SIOW, 1, NotSerialized) */ |
| 198 | acpigen_write_method("SIOW", 1); |
| 199 | acpigen_write_store(); |
| 200 | acpigen_emit_namestring("^GPS2"); |
| 201 | acpigen_emit_namestring("^^PMFG"); |
| 202 | |
| 203 | acpigen_write_store(); |
| 204 | acpigen_emit_byte(ZERO_OP); |
| 205 | acpigen_emit_namestring("^GPEE"); |
| 206 | |
| 207 | acpigen_write_store(); |
| 208 | acpigen_emit_byte(ZERO_OP); |
| 209 | acpigen_emit_namestring("^GPE0"); |
| 210 | |
| 211 | acpigen_write_store(); |
| 212 | acpigen_emit_byte(ZERO_OP); |
| 213 | acpigen_emit_namestring("^GPE1"); |
| 214 | |
| 215 | acpigen_emit_byte(AND_OP); |
| 216 | acpigen_emit_namestring("^LEDC"); |
| 217 | acpigen_write_integer(0xE0); |
| 218 | acpigen_emit_byte(LOCAL0_OP); |
| 219 | |
| 220 | acpigen_emit_byte(OR_OP); |
| 221 | acpigen_emit_byte(LOCAL0_OP); |
| 222 | acpigen_write_integer(0x1E); |
| 223 | acpigen_emit_namestring("^LEDC"); |
| 224 | |
| 225 | acpigen_emit_byte(AND_OP); |
| 226 | acpigen_emit_namestring("^SWCC"); |
| 227 | acpigen_write_integer(0xBF); |
| 228 | acpigen_emit_namestring("^SWCC"); |
| 229 | |
| 230 | acpigen_pop_len(); /* SIOW method */ |
| 231 | |
| 232 | /* Method (SIOS, 1, NotSerialized) */ |
| 233 | acpigen_write_method("SIOS", 1); |
| 234 | |
| 235 | acpigen_write_if(); |
| 236 | acpigen_emit_byte(LNOT_OP); |
| 237 | acpigen_emit_byte(LEQUAL_OP); |
| 238 | acpigen_emit_byte(ARG0_OP); |
| 239 | acpigen_write_integer(5); |
| 240 | |
| 241 | acpigen_write_if(); |
| 242 | acpigen_emit_byte(LEQUAL_OP); |
| 243 | acpigen_emit_namestring("^^KBFG"); |
| 244 | acpigen_emit_byte(ONE_OP); |
| 245 | |
| 246 | acpigen_emit_byte(OR_OP); |
| 247 | acpigen_emit_namestring("^GPE2"); |
| 248 | acpigen_write_integer(0xE8); |
| 249 | acpigen_emit_namestring("^GPE2"); |
| 250 | |
| 251 | acpigen_pop_len(); /* Pop If */ |
| 252 | acpigen_write_else(); |
| 253 | |
| 254 | acpigen_emit_byte(AND_OP); |
| 255 | acpigen_emit_namestring("^GPE2"); |
| 256 | acpigen_write_integer(0x17); |
| 257 | acpigen_emit_namestring("^GPE2"); |
| 258 | |
| 259 | acpigen_pop_len(); /* Pop Else */ |
| 260 | |
| 261 | acpigen_write_if(); |
| 262 | acpigen_emit_byte(LEQUAL_OP); |
| 263 | acpigen_emit_namestring("^^MSFG"); |
| 264 | acpigen_emit_byte(ONE_OP); |
| 265 | |
| 266 | acpigen_emit_byte(OR_OP); |
| 267 | acpigen_emit_namestring("^GPE2"); |
| 268 | acpigen_write_integer(0x10); |
| 269 | acpigen_emit_namestring("^GPE2"); |
| 270 | |
| 271 | acpigen_pop_len(); /* Pop If */ |
| 272 | acpigen_write_else(); |
| 273 | |
| 274 | acpigen_emit_byte(AND_OP); |
| 275 | acpigen_emit_namestring("^GPE2"); |
| 276 | acpigen_write_integer(0xEF); |
| 277 | acpigen_emit_namestring("^GPE2"); |
| 278 | |
| 279 | acpigen_pop_len(); /* Pop Else */ |
| 280 | |
| 281 | /* Enable wake on GPE */ |
| 282 | acpigen_write_store(); |
| 283 | acpigen_emit_byte(ONE_OP); |
| 284 | acpigen_emit_namestring("^GPEE"); |
| 285 | |
| 286 | acpigen_write_if(); |
| 287 | acpigen_emit_byte(LEQUAL_OP); |
| 288 | acpigen_emit_byte(ARG0_OP); |
| 289 | acpigen_write_integer(3); |
| 290 | |
| 291 | acpigen_emit_byte(AND_OP); |
| 292 | acpigen_emit_namestring("^LEDC"); |
| 293 | acpigen_write_integer(0xE0); |
| 294 | acpigen_emit_byte(LOCAL0_OP); |
| 295 | |
| 296 | acpigen_emit_byte(OR_OP); |
| 297 | acpigen_emit_byte(LOCAL0_OP); |
| 298 | acpigen_write_integer(0x1C); |
| 299 | acpigen_emit_namestring("^LEDC"); |
| 300 | |
| 301 | acpigen_emit_byte(AND_OP); |
| 302 | acpigen_emit_namestring("^SWCC"); |
| 303 | acpigen_write_integer(0xBF); |
| 304 | acpigen_emit_byte(LOCAL0_OP); |
| 305 | |
| 306 | acpigen_emit_byte(OR_OP); |
| 307 | acpigen_emit_byte(LOCAL0_OP); |
| 308 | acpigen_write_integer(0x40); |
| 309 | acpigen_emit_namestring("^SWCC"); |
| 310 | |
| 311 | acpigen_pop_len(); /* Pop If */ |
| 312 | |
| 313 | acpigen_pop_len(); /* Pop If */ |
| 314 | |
| 315 | acpigen_write_store(); |
| 316 | acpigen_write_integer(0x10); |
| 317 | acpigen_emit_namestring("^GPE0"); |
| 318 | |
| 319 | acpigen_write_store(); |
| 320 | acpigen_write_integer(0x20); |
| 321 | acpigen_emit_namestring("^GPE1"); |
| 322 | |
| 323 | acpigen_pop_len(); /* Pop SIOS method */ |
| 324 | |
| 325 | acpigen_pop_len(); /* Pop Scope */ |
| 326 | |
| 327 | /* Inject into parent: */ |
John Zhao | 8f5fbb0 | 2020-06-26 10:38:42 -0700 | [diff] [blame^] | 328 | if (!scope) { |
| 329 | printk(BIOS_ERR, "%s: Missing ACPI path/scope\n", dev_path(dev)); |
| 330 | return; |
| 331 | } |
| 332 | acpigen_write_scope(scope); |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 333 | |
| 334 | acpigen_write_name_integer("MSFG", 1); |
| 335 | acpigen_write_name_integer("KBFG", 1); |
| 336 | acpigen_write_name_integer("PMFG", 0); |
| 337 | |
| 338 | /* DSDT must call SIOW on _WAK */ |
| 339 | /* Method (SIOW, 1, NotSerialized) */ |
| 340 | acpigen_write_method("SIOW", 1); |
| 341 | acpigen_emit_byte(RETURN_OP); |
| 342 | tmp_name = strconcat(name, ".SIOW"); |
| 343 | acpigen_emit_namestring(tmp_name); |
| 344 | free(tmp_name); |
| 345 | |
| 346 | acpigen_emit_byte(ARG0_OP); |
| 347 | acpigen_pop_len(); |
| 348 | |
| 349 | /* DSDT must call SIOS on _PTS */ |
| 350 | /* Method (SIOS, 1, NotSerialized) */ |
| 351 | acpigen_write_method("SIOS", 1); |
| 352 | acpigen_emit_byte(RETURN_OP); |
| 353 | tmp_name = strconcat(name, ".SIOS"); |
| 354 | acpigen_emit_namestring(tmp_name); |
| 355 | free(tmp_name); |
| 356 | acpigen_emit_byte(ARG0_OP); |
| 357 | acpigen_pop_len(); /* Pop Method */ |
| 358 | |
| 359 | acpigen_pop_len(); /* Scope */ |
| 360 | |
| 361 | acpigen_write_scope("\\_GPE"); |
| 362 | |
| 363 | /* Method (SIOH, 0, NotSerialized) */ |
| 364 | acpigen_write_method("_L08", 0); |
| 365 | acpigen_emit_byte(AND_OP); |
| 366 | tmp_name = strconcat(scope, ".PMFG"); |
| 367 | acpigen_emit_namestring(tmp_name); |
| 368 | free(tmp_name); |
| 369 | acpigen_write_integer(0xE8); |
| 370 | acpigen_emit_byte(LOCAL0_OP); |
| 371 | |
| 372 | acpigen_write_if(); |
| 373 | acpigen_emit_byte(LGREATER_OP); |
| 374 | acpigen_emit_byte(LOCAL0_OP); |
| 375 | acpigen_emit_byte(ZERO_OP); |
| 376 | |
| 377 | acpigen_emit_byte(NOTIFY_OP); |
| 378 | tmp_name = strconcat(scope, ".L060"); |
| 379 | acpigen_emit_namestring(tmp_name); |
| 380 | free(tmp_name); |
| 381 | acpigen_write_integer(2); |
| 382 | |
| 383 | acpigen_pop_len(); /* Pop If */ |
| 384 | |
| 385 | acpigen_emit_byte(AND_OP); |
| 386 | tmp_name = strconcat(scope, ".PMFG"); |
| 387 | acpigen_emit_namestring(tmp_name); |
| 388 | free(tmp_name); |
| 389 | acpigen_write_integer(0x10); |
| 390 | acpigen_emit_byte(LOCAL0_OP); |
| 391 | |
| 392 | acpigen_write_if(); |
| 393 | acpigen_emit_byte(LGREATER_OP); |
| 394 | acpigen_emit_byte(LOCAL0_OP); |
| 395 | acpigen_emit_byte(ZERO_OP); |
| 396 | |
| 397 | acpigen_emit_byte(NOTIFY_OP); |
| 398 | tmp_name = strconcat(scope, ".L050"); |
| 399 | acpigen_emit_namestring(tmp_name); |
| 400 | free(tmp_name); |
| 401 | acpigen_write_integer(2); |
| 402 | acpigen_pop_len(); /* Pop If */ |
| 403 | |
| 404 | acpigen_pop_len(); /* Pop Method */ |
| 405 | |
| 406 | acpigen_pop_len(); /* Scope */ |
| 407 | } |
| 408 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 409 | static void npcd378_fill_ssdt_generator(const struct device *dev) |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 410 | { |
John Zhao | 8f5fbb0 | 2020-06-26 10:38:42 -0700 | [diff] [blame^] | 411 | if (!dev) |
| 412 | return; |
| 413 | |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 414 | superio_common_fill_ssdt_generator(dev); |
| 415 | |
| 416 | switch (dev->path.pnp.device) { |
| 417 | case NPCD378_PWR: |
| 418 | npcd378_ssdt_pwr(dev); |
| 419 | break; |
| 420 | case NPCD378_AUX: |
| 421 | npcd378_ssdt_aux(dev); |
| 422 | break; |
| 423 | case NPCD378_KBC: |
| 424 | npcd378_ssdt_kbc(dev); |
| 425 | break; |
| 426 | } |
Patrick Rudolph | 9ae150a | 2018-07-17 11:41:10 +0200 | [diff] [blame] | 427 | } |
| 428 | #endif |
| 429 | |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 430 | static struct device_operations ops = { |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 431 | .read_resources = pnp_read_resources, |
| 432 | .set_resources = pnp_set_resources, |
| 433 | .enable_resources = pnp_enable_resources, |
| 434 | .enable = pnp_alt_enable, |
| 435 | .init = npcd378_init, |
| 436 | .ops_pnp_mode = &pnp_conf_mode_8787_aa, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 437 | #if CONFIG(HAVE_ACPI_TABLES) |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 438 | .acpi_fill_ssdt = npcd378_fill_ssdt_generator, |
| 439 | .acpi_name = superio_common_ldn_acpi_name, |
| 440 | .acpi_hid = npcd378_acpi_hid, |
Patrick Rudolph | 9ae150a | 2018-07-17 11:41:10 +0200 | [diff] [blame] | 441 | #endif |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 442 | }; |
| 443 | |
| 444 | static struct pnp_info pnp_dev_info[] = { |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 445 | { NULL, NPCD378_FDC, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, }, |
| 446 | { NULL, NPCD378_PP, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, }, |
| 447 | { NULL, NPCD378_SP1, PNP_IO0|PNP_IRQ0, 0x0ff8, }, |
| 448 | { NULL, NPCD378_SP2, PNP_IO0|PNP_IRQ0, 0x0ff8, }, |
| 449 | { NULL, NPCD378_PWR, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0| |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 450 | PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7| |
| 451 | PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE, |
Patrick Rudolph | 61c3b59 | 2018-07-17 11:36:15 +0200 | [diff] [blame] | 452 | 0x0ff8, 0x0ff0}, |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 453 | { NULL, NPCD378_AUX, PNP_IRQ0, 0x0fff, 0x0fff, }, |
| 454 | { NULL, NPCD378_KBC, PNP_IO0|PNP_IO1|PNP_IRQ0, |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 455 | 0x0fff, 0x0fff, }, |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 456 | { NULL, NPCD378_WDT1, PNP_IO0|PNP_MSC8|PNP_MSC9| |
Patrick Rudolph | 61c3b59 | 2018-07-17 11:36:15 +0200 | [diff] [blame] | 457 | PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE, 0x0fe0}, |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 458 | { NULL, NPCD378_HWM, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3| |
Patrick Rudolph | 61c3b59 | 2018-07-17 11:36:15 +0200 | [diff] [blame] | 459 | PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_IRQ0, 0x0f00}, |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 460 | { NULL, NPCD378_GPIO_PP_OD, PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3| |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 461 | PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_MSC8|PNP_MSC9|PNP_MSCA| |
| 462 | PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE}, |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 463 | { NULL, NPCD378_I2C, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0| |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 464 | PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7| |
| 465 | PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE, |
Patrick Rudolph | 61c3b59 | 2018-07-17 11:36:15 +0200 | [diff] [blame] | 466 | 0x0ff0, 0x0ff0}, |
| 467 | { NULL, NPCD378_SUSPEND, PNP_IO0, 0x0fe0 }, |
Felix Held | 9911d64 | 2018-07-06 20:55:53 +0200 | [diff] [blame] | 468 | { NULL, NPCD378_GPIOA, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3| |
Patrick Rudolph | 61c3b59 | 2018-07-17 11:36:15 +0200 | [diff] [blame] | 469 | PNP_MSC4, 0x0fe0}, |
Patrick Rudolph | 4576600 | 2018-03-27 15:58:38 +0200 | [diff] [blame] | 470 | }; |
| 471 | |
| 472 | static void enable_dev(struct device *dev) |
| 473 | { |
| 474 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); |
| 475 | } |
| 476 | |
| 477 | struct chip_operations superio_nuvoton_npcd378_ops = { |
| 478 | CHIP_NAME("NUVOTON NPCD378 Super I/O") |
| 479 | .enable_dev = enable_dev, |
| 480 | }; |