blob: 2f4c77756171b022a00889724517f52ff52bf766 [file] [log] [blame]
Patrick Georgic49d7a32020-05-08 22:50:46 +02001## SPDX-License-Identifier: GPL-2.0-only
Kyösti Mälkki54c586c2013-06-10 11:40:54 +03002
Aaron Durbin7dcb5452015-07-30 16:50:21 -05003# CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build.
4subdirs-y += firmware
5
Arthur Heymans63998ad2019-06-04 13:43:25 +02006all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c
Patrick Rudolph45022ae2018-10-01 19:17:11 +02007
Angel Ponseef43432021-01-12 22:25:28 +01008all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET) += hpet.c
9
Angel Pons20a609f2021-02-06 23:22:33 +010010all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME) += me.c
11
Husni Faizf571ce52022-09-05 15:28:53 +053012ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
13bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c
14endif
Angel Pons90e9f542020-06-01 19:31:53 +020015romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c
16
Husni Faizf571ce52022-09-05 15:28:53 +053017ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
18all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
19else
Frans Hendriksb27fb332019-03-04 08:02:43 +010020romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
21ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
Husni Faizf571ce52022-09-05 15:28:53 +053022endif
Angel Pons79b2a152020-12-05 20:43:00 +010023ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus_ops.c
Frans Hendriksb27fb332019-03-04 08:02:43 +010024
Patrick Rudolph1ae592b2019-03-24 14:41:45 +010025romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB) += pmclib.c
26
Elyes HAOUAS551a7592019-05-01 16:56:36 +020027ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
28
Arthur Heymansb8bda112019-06-04 13:57:47 +020029all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
30smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
Patrick Rudolph853bb4d2018-06-28 13:58:36 +020031
Arthur Heymans3457df12019-11-16 10:04:41 +010032bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c
33romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c
34ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c
Stefan Reinauer13e41822015-04-27 14:02:36 -070035
Arthur Heymansc5839202019-11-12 23:48:42 +010036bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
Arthur Heymansb7619032021-04-30 16:11:37 +020037verstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
Patrick Rudolph59de6c92015-12-26 08:33:16 +010038romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
39ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
40smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
Arthur Heymans16fe7902017-04-12 17:01:31 +020041
Arthur Heymans63998ad2019-06-04 13:43:25 +020042all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
Arthur Heymansbddef0d2017-09-25 12:21:07 +020043ifeq ($(CONFIG_SPI_FLASH_SMM),y)
44smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
45endif
46
Tobias Diedrich9d8be5a2017-12-13 23:25:32 +010047ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN) += acpi_pirq_gen.c
48ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ) += rcba_pirq.c
49
Arthur Heymansa0508172018-01-25 11:30:22 +010050ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c
51smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c
52
Tristan Corrick63626b12018-11-30 22:53:50 +130053smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
54
Arthur Heymans074730c2019-06-04 14:05:53 +020055all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c