blob: e7a96ba15e299d3924b68ff4170fa2193da6fac0 [file] [log] [blame]
Ronald G. Minnichdf46cb22006-04-18 16:36:58 +00001uses HAVE_MP_TABLE
2uses HAVE_PIRQ_TABLE
3uses USE_FALLBACK_IMAGE
4uses HAVE_FALLBACK_BOOT
5uses HAVE_HARD_RESET
6uses HAVE_OPTION_TABLE
7uses USE_OPTION_TABLE
8uses CONFIG_ROM_STREAM
9uses IRQ_SLOT_COUNT
10uses MAINBOARD
11uses MAINBOARD_VENDOR
12uses MAINBOARD_PART_NUMBER
13uses LINUXBIOS_EXTRA_VERSION
14uses ARCH
15uses FALLBACK_SIZE
16uses STACK_SIZE
17uses HEAP_SIZE
18uses ROM_SIZE
19uses ROM_SECTION_SIZE
20uses ROM_IMAGE_SIZE
21uses ROM_SECTION_SIZE
22uses ROM_SECTION_OFFSET
23uses CONFIG_ROM_STREAM_START
Ronald G. Minnichbad9d102006-05-18 03:07:16 +000024uses CONFIG_COMPRESSED_ROM_STREAM
Stefan Reinauer8ad7c062006-08-03 16:19:27 +000025uses CONFIG_PRECOMPRESSED_ROM_STREAM
Ronald G. Minnichdf46cb22006-04-18 16:36:58 +000026uses PAYLOAD_SIZE
27uses _ROMBASE
28uses _RAMBASE
29uses XIP_ROM_SIZE
30uses XIP_ROM_BASE
31uses HAVE_MP_TABLE
32uses CROSS_COMPILE
33uses CC
34uses HOSTCC
35uses OBJCOPY
36uses DEFAULT_CONSOLE_LOGLEVEL
37uses MAXIMUM_CONSOLE_LOGLEVEL
38uses CONFIG_CONSOLE_SERIAL8250
39uses TTYS0_BAUD
40uses TTYS0_BASE
41uses TTYS0_LCS
42uses CONFIG_UDELAY_TSC
43uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
44
45## ROM_SIZE is the size of boot ROM that this board will use.
46default ROM_SIZE = 256*1024
47
48###
49### Build options
50###
51
52##
53## Build code for the fallback boot
54##
55default HAVE_FALLBACK_BOOT=1
56
57##
58## no MP table
59##
60default HAVE_MP_TABLE=0
61
62##
63## Build code to reset the motherboard from linuxBIOS
64##
65default HAVE_HARD_RESET=0
66
67## Delay timer options
68##
69default CONFIG_UDELAY_TSC=1
70default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
71
72##
73## Build code to export a programmable irq routing table
74##
75default HAVE_PIRQ_TABLE=1
76default IRQ_SLOT_COUNT=2
77#object irq_tables.o
78
79##
80## Build code to export a CMOS option table
81##
82default HAVE_OPTION_TABLE=0
83
84###
85### LinuxBIOS layout values
86###
87
88## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
89default ROM_IMAGE_SIZE = 65536
90default FALLBACK_SIZE = 131072
91
92##
93## Use a small 8K stack
94##
95default STACK_SIZE=0x2000
96
97##
98## Use a small 16K heap
99##
100default HEAP_SIZE=0x4000
101
102##
103## Only use the option table in a normal image
104##
105#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
106default USE_OPTION_TABLE = 0
107
108default _RAMBASE = 0x00004000
109
110default CONFIG_ROM_STREAM = 1
111
112##
113## The default compiler
114##
115default CROSS_COMPILE=""
116default CC="$(CROSS_COMPILE)gcc -m32"
117default HOSTCC="gcc"
118
119##
120## The Serial Console
121##
122
123# To Enable the Serial Console
124default CONFIG_CONSOLE_SERIAL8250=1
125
126## Select the serial console baud rate
127default TTYS0_BAUD=115200
128#default TTYS0_BAUD=57600
129#default TTYS0_BAUD=38400
130#default TTYS0_BAUD=19200
131#default TTYS0_BAUD=9600
132#default TTYS0_BAUD=4800
133#default TTYS0_BAUD=2400
134#default TTYS0_BAUD=1200
135
136# Select the serial console base port
137default TTYS0_BASE=0x3f8
138
139# Select the serial protocol
140# This defaults to 8 data bits, 1 stop bit, and no parity
141default TTYS0_LCS=0x3
142
143##
144### Select the linuxBIOS loglevel
145##
146## EMERG 1 system is unusable
147## ALERT 2 action must be taken immediately
148## CRIT 3 critical conditions
149## ERR 4 error conditions
150## WARNING 5 warning conditions
151## NOTICE 6 normal but significant condition
152## INFO 7 informational
153## DEBUG 8 debug-level messages
154## SPEW 9 Way too many details
155
156## Request this level of debugging output
157default DEFAULT_CONSOLE_LOGLEVEL=8
158## At a maximum only compile in this level of debugging
159default MAXIMUM_CONSOLE_LOGLEVEL=8
160
161end
162