Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: BSD-3-Clause |
Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 2 | |
Martin Roth | 1f33762 | 2019-04-22 16:08:31 -0600 | [diff] [blame] | 3 | ifeq ($(CONFIG_SOC_AMD_PICASSO),y) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 4 | |
| 5 | subdirs-y += ../../../cpu/amd/mtrr/ |
| 6 | subdirs-y += ../../../cpu/x86/tsc |
| 7 | subdirs-y += ../../../cpu/x86/lapic |
| 8 | subdirs-y += ../../../cpu/x86/cache |
| 9 | subdirs-y += ../../../cpu/x86/mtrr |
| 10 | subdirs-y += ../../../cpu/x86/pae |
| 11 | subdirs-y += ../../../cpu/x86/smm |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 12 | subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 13 | |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 14 | bootblock-y += bootblock/bootblock.c |
Raul E Rangel | d53c281 | 2020-06-11 14:06:11 -0600 | [diff] [blame] | 15 | bootblock-y += aoac.c |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 16 | bootblock-y += southbridge.c |
| 17 | bootblock-y += i2c.c |
Furquan Shaikh | ca481ee | 2020-06-13 00:16:26 -0700 | [diff] [blame] | 18 | bootblock-y += uart.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 19 | bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c |
Kangheui Won | 9f7df5c1 | 2020-10-04 21:12:06 +1100 | [diff] [blame] | 20 | bootblock-y += monotonic_timer.c |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 21 | bootblock-y += tsc_freq.c |
| 22 | bootblock-y += gpio.c |
| 23 | bootblock-y += smi_util.c |
Furquan Shaikh | 033aa0d | 2020-05-09 14:26:37 -0700 | [diff] [blame] | 24 | bootblock-y += config.c |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 25 | bootblock-y += reset.c |
Martin Roth | 4b34193 | 2020-10-06 15:29:28 -0600 | [diff] [blame] | 26 | bootblock-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += bootblock/vboot_bootblock.c |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 27 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 28 | romstage-y += i2c.c |
| 29 | romstage-y += romstage.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 30 | romstage-y += gpio.c |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 31 | romstage-y += reset.c |
Kyösti Mälkki | 047a9e4 | 2019-08-03 21:28:40 +0300 | [diff] [blame] | 32 | romstage-y += memmap.c |
Furquan Shaikh | ca481ee | 2020-06-13 00:16:26 -0700 | [diff] [blame] | 33 | romstage-y += uart.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 34 | romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c |
Kangheui Won | 9f7df5c1 | 2020-10-04 21:12:06 +1100 | [diff] [blame] | 35 | romstage-y += monotonic_timer.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 36 | romstage-y += tsc_freq.c |
Raul E Rangel | d53c281 | 2020-06-11 14:06:11 -0600 | [diff] [blame] | 37 | romstage-y += aoac.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 38 | romstage-y += southbridge.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 39 | romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c |
Marshall Dawson | 5a73fc3 | 2020-01-24 09:42:57 -0700 | [diff] [blame] | 40 | romstage-y += psp.c |
Furquan Shaikh | 033aa0d | 2020-05-09 14:26:37 -0700 | [diff] [blame] | 41 | romstage-y += config.c |
Furquan Shaikh | f9be2d1 | 2020-06-08 12:30:40 -0700 | [diff] [blame] | 42 | romstage-y += mrc_cache.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 43 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 44 | verstage-y += i2c.c |
Furquan Shaikh | 033aa0d | 2020-05-09 14:26:37 -0700 | [diff] [blame] | 45 | verstage-y += config.c |
Raul E Rangel | d53c281 | 2020-06-11 14:06:11 -0600 | [diff] [blame] | 46 | verstage-y += aoac.c |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 47 | verstage_x86-y += gpio.c |
| 48 | verstage_x86-y += uart.c |
| 49 | verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c |
Kangheui Won | 9f7df5c1 | 2020-10-04 21:12:06 +1100 | [diff] [blame] | 50 | verstage_x86-y += monotonic_timer.c |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 51 | verstage_x86-y += tsc_freq.c |
| 52 | verstage_x86-y += reset.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 53 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 54 | ramstage-y += i2c.c |
| 55 | ramstage-y += chip.c |
| 56 | ramstage-y += cpu.c |
Furquan Shaikh | 0c707d4 | 2020-07-08 16:54:40 -0700 | [diff] [blame] | 57 | ramstage-y += data_fabric.c |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 58 | ramstage-y += root_complex.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 59 | ramstage-y += mca.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 60 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c |
Matt Papageorge | a21eae0 | 2019-11-13 17:00:12 -0600 | [diff] [blame] | 61 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 62 | ramstage-y += gpio.c |
Raul E Rangel | d53c281 | 2020-06-11 14:06:11 -0600 | [diff] [blame] | 63 | ramstage-y += aoac.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 64 | ramstage-y += southbridge.c |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 65 | ramstage-y += reset.c |
Marshall Dawson | 3edc9e2 | 2019-08-16 08:45:20 -0600 | [diff] [blame] | 66 | ramstage-y += acp.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 67 | ramstage-y += sata.c |
Kyösti Mälkki | 047a9e4 | 2019-08-03 21:28:40 +0300 | [diff] [blame] | 68 | ramstage-y += memmap.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 69 | ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c |
| 70 | ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c |
Furquan Shaikh | ca481ee | 2020-06-13 00:16:26 -0700 | [diff] [blame] | 71 | ramstage-y += uart.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 72 | ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c |
Kangheui Won | 9f7df5c1 | 2020-10-04 21:12:06 +1100 | [diff] [blame] | 73 | ramstage-y += monotonic_timer.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 74 | ramstage-y += tsc_freq.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 75 | ramstage-y += finalize.c |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 76 | ramstage-y += soc_util.c |
Marshall Dawson | 5a73fc3 | 2020-01-24 09:42:57 -0700 | [diff] [blame] | 77 | ramstage-y += psp.c |
Aaron Durbin | 89e51e6 | 2020-04-09 14:16:55 -0600 | [diff] [blame] | 78 | ramstage-y += fsp_params.c |
Furquan Shaikh | 033aa0d | 2020-05-09 14:26:37 -0700 | [diff] [blame] | 79 | ramstage-y += config.c |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 80 | ramstage-y += update_microcode.c |
Martin Roth | 86ba0d7 | 2020-02-05 16:46:30 -0700 | [diff] [blame] | 81 | ramstage-y += graphics.c |
Furquan Shaikh | cff479e | 2020-07-08 15:47:19 -0700 | [diff] [blame] | 82 | ramstage-y += pcie_gpp.c |
Raul E Rangel | 0357ab7 | 2020-07-09 12:08:58 -0600 | [diff] [blame] | 83 | ramstage-y += xhci.c |
Rob Barnes | 009a23d | 2020-04-13 01:27:12 -0600 | [diff] [blame] | 84 | ramstage-y += dmi.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 85 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 86 | smm-y += smihandler.c |
| 87 | smm-y += smi_util.c |
Kangheui Won | 9f7df5c1 | 2020-10-04 21:12:06 +1100 | [diff] [blame] | 88 | smm-y += monotonic_timer.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 89 | smm-y += tsc_freq.c |
Felix Held | 9412b3e | 2020-06-18 15:54:43 +0200 | [diff] [blame] | 90 | ifeq ($(CONFIG_DEBUG_SMI),y) |
| 91 | smm-y += uart.c |
| 92 | smm-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c |
| 93 | endif |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 94 | smm-y += gpio.c |
Marshall Dawson | 5a73fc3 | 2020-01-24 09:42:57 -0700 | [diff] [blame] | 95 | smm-y += psp.c |
Marshall Dawson | 5c5049e | 2020-04-23 06:43:44 -0600 | [diff] [blame] | 96 | smm-y += smu.c |
Furquan Shaikh | 033aa0d | 2020-05-09 14:26:37 -0700 | [diff] [blame] | 97 | smm-y += config.c |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 98 | |
Martin Roth | d7e3ead | 2019-04-22 16:32:58 -0600 | [diff] [blame] | 99 | CPPFLAGS_common += -I$(src)/soc/amd/picasso |
| 100 | CPPFLAGS_common += -I$(src)/soc/amd/picasso/include |
| 101 | CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi |
Marshall Dawson | 00a2208 | 2020-01-20 23:05:31 -0700 | [diff] [blame] | 102 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso |
Martin Roth | 0f3ef70 | 2020-10-06 18:11:12 -0600 | [diff] [blame] | 103 | CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 104 | |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 105 | MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR) |
| 106 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 107 | # ROMSIG Normally At ROMBASE + 0x20000 |
| 108 | # Overridden by CONFIG_AMD_FWM_POSITION_INDEX |
| 109 | # +-----------+---------------+----------------+------------+ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 110 | # |0x55AA55AA | | | | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 111 | # +-----------+---------------+----------------+------------+ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 112 | # | | PSPDIR ADDR | BIOSDIR ADDR | |
| 113 | # +-----------+---------------+----------------+ |
| 114 | |
Marshall Dawson | bc4c903 | 2019-06-11 12:18:20 -0600 | [diff] [blame] | 115 | PICASSO_FWM_POSITION=$(call int-add, \ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 116 | $(call int-subtract, 0xffffffff \ |
| 117 | $(call int-shift-left, \ |
| 118 | 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) |
| 119 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 120 | # |
| 121 | # PSP Directory Table items |
| 122 | # |
| 123 | # Certain ordering requirements apply, however these are ensured by amdfwtool. |
| 124 | # For more information see "AMD Platform Security Processor BIOS Architecture |
| 125 | # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). |
| 126 | # |
| 127 | |
Zheng Bao | 3384e4a | 2020-10-06 12:03:11 +0800 | [diff] [blame] | 128 | FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}') |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 129 | |
Furquan Shaikh | 577db02 | 2020-04-24 15:52:04 -0700 | [diff] [blame] | 130 | ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y) |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 131 | # Enable secure debug unlock |
| 132 | PSP_SOFTFUSE_BITS += 0 |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 133 | OPT_TOKEN_UNLOCK="--token-unlock" |
Furquan Shaikh | 577db02 | 2020-04-24 15:52:04 -0700 | [diff] [blame] | 134 | endif |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 135 | |
Zheng Bao | 6252b60 | 2020-09-11 17:06:19 +0800 | [diff] [blame] | 136 | ifeq ($(CONFIG_USE_PSPSECUREOS),y) |
Furquan Shaikh | 4e8b639 | 2020-04-23 19:48:28 -0700 | [diff] [blame] | 137 | # types = 0x2 |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 138 | OPT_PSP_USE_PSPSECUREOS="--use-pspsecureos" |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 139 | endif |
| 140 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 141 | |
| 142 | ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 143 | OPT_PSP_LOAD_MP2_FW="--load-mp2-fw" |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 144 | else |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 145 | # Disable MP2 firmware loading |
| 146 | PSP_SOFTFUSE_BITS += 29 |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 147 | endif |
| 148 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 149 | ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 150 | OPT_PSP_LOAD_S0I3_FW="--load-s0i3" |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 151 | endif |
| 152 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 153 | # type = 0x3a |
| 154 | ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) |
| 155 | PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) |
| 156 | endif |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 157 | # |
| 158 | # BIOS Directory Table items - proper ordering is managed by amdfwtool |
| 159 | # |
| 160 | |
| 161 | # type = 0x60 |
Rob Barnes | b2545cc | 2020-09-09 13:19:09 -0600 | [diff] [blame] | 162 | PSP_APCB_FILES=$(APCB_SOURCES) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 163 | |
| 164 | # type = 0x61 |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 165 | PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 166 | |
| 167 | # type = 0x62 |
| 168 | PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 169 | PSP_ELF_FILE=$(objcbfs)/bootblock.elf |
Zheng Bao | 944d00b | 2020-08-17 11:11:48 +0800 | [diff] [blame] | 170 | PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') |
| 171 | PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 172 | # type = 0x63 - construct APOB NV base/size from flash map |
Felix Held | 77a63ef | 2020-09-22 01:23:54 +0200 | [diff] [blame] | 173 | # The flashmap section used for this is expected to be named RW_MRC_CACHE |
| 174 | APOB_NV_SIZE=$(shell grep "FMAP_SECTION_RW_MRC_CACHE_SIZE" $(obj)/fmap_config.h | awk '{print $$(NF)}') |
| 175 | APOB_NV_BASE=$(shell grep "FMAP_SECTION_RW_MRC_CACHE_START" $(obj)/fmap_config.h | awk '{print $$(NF)}') |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 176 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 177 | # type = 0x66 |
Zheng Bao | 3384e4a | 2020-10-06 12:03:11 +0800 | [diff] [blame] | 178 | PSP_UCODE_FILE1=$(FIRMWARE_LOCATION)/UcodePatch_PCO_B1.bin |
| 179 | PSP_UCODE_FILE2=$(FIRMWARE_LOCATION)/UcodePatch_PCO_B0.bin |
| 180 | PSP_UCODE_FILE3=$(FIRMWARE_LOCATION)/UcodePatch_RV2_A0.bin |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 181 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 182 | ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) |
| 183 | # type = 0x6B - PSP Shared memory location |
| 184 | ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0) |
| 185 | PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE) |
| 186 | _PSP_SHAREDMEM_BASE=$(shell grep _psp_sharedmem_dram $(obj)/cbfs/$(CONFIG_CBFS_PREFIX)/bootblock.map | cut -f1 -d' ') |
| 187 | PSP_SHAREDMEM_BASE=$(shell printf "0x%s" $(_PSP_SHAREDMEM_BASE)) |
| 188 | endif |
| 189 | |
| 190 | # type = 0x52 - PSP Bootloader Userspace Application (verstage) |
Martin Roth | de49833 | 2020-09-01 11:00:28 -0600 | [diff] [blame] | 191 | PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE)) |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 192 | PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN)) |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 193 | endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK |
| 194 | |
Furquan Shaikh | 318e583 | 2020-04-24 14:04:07 -0700 | [diff] [blame] | 195 | # type = 0xb - See #55758 (NDA) for bit definitions. |
| 196 | PSP_SOFTFUSE_BITS += 28 |
| 197 | |
| 198 | # Helper function to return a value with given bit set |
| 199 | set-bit=$(call int-shift-left, 1 $(call _toint,$1)) |
| 200 | PSP_SOFTFUSE=$(shell A=$(call int-add, \ |
| 201 | $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A) |
| 202 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 203 | # |
| 204 | # Build the arguments to amdfwtool (order is unimportant). Missing file names |
| 205 | # result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool. |
| 206 | # |
| 207 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 208 | add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) |
| 209 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 210 | OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 211 | OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 212 | |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 213 | OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \ |
| 214 | $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \ |
| 215 | --instance $(shell printf "%x" $$(($(i)-1))) --apcb )) |
| 216 | |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 217 | OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) |
| 218 | OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) |
| 219 | OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) |
| 220 | OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 221 | |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 222 | OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem) |
| 223 | OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) |
Martin Roth | 6e5f909 | 2020-06-25 17:31:54 -0600 | [diff] [blame] | 224 | OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size) |
| 225 | OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base) |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 226 | OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) |
| 227 | OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) |
| 228 | OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 229 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 230 | OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse) |
| 231 | |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 232 | ifeq ($(CONFIG_VBOOT),) |
| 233 | OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE) |
| 234 | OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE) |
| 235 | endif |
| 236 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 237 | OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) |
| 238 | |
| 239 | # Add all the files listed in the config file |
Zheng Bao | af2efbb | 2020-11-05 18:26:10 +0800 | [diff] [blame] | 240 | POUND_SIGN=$(call strip_quotes, "\#") |
| 241 | DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 242 | |
| 243 | AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 244 | $(OPT_APOB_ADDR) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 245 | $(OPT_PSP_BIOSBIN_FILE) \ |
| 246 | $(OPT_PSP_BIOSBIN_DEST) \ |
| 247 | $(OPT_PSP_BIOSBIN_SIZE) \ |
| 248 | $(OPT_PSP_SOFTFUSE) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 249 | $(OPT_PSP_USE_PSPSECUREOS) \ |
| 250 | $(OPT_PSP_LOAD_MP2_FW) \ |
| 251 | $(OPT_PSP_LOAD_S0I3_FW) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 252 | $(OPT_WHITELIST_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 253 | $(OPT_SEC_DEBUG_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 254 | $(OPT_PSP_SHAREDMEM_BASE) \ |
| 255 | $(OPT_PSP_SHAREDMEM_SIZE) \ |
| 256 | --combo-capable \ |
| 257 | $(OPT_TOKEN_UNLOCK) \ |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 258 | $(OPT_EFS_SPI_READ_MODE) \ |
| 259 | $(OPT_EFS_SPI_SPEED) \ |
| 260 | $(OPT_EFS_SPI_MICRON_FLAG) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 261 | --config $(CONFIG_AMDFW_CONFIG_FILE) \ |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 262 | --soc-name "Picasso" \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 263 | --flashsize $(CONFIG_ROM_SIZE) |
| 264 | |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 265 | $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ |
Martin Roth | 362eaf3 | 2020-06-14 10:38:32 -0600 | [diff] [blame] | 266 | $(PSP_VERSTAGE_FILE) \ |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 267 | $(PSP_VERSTAGE_SIG_FILE) \ |
Raul E Rangel | cbaa835 | 2020-05-13 14:01:09 -0600 | [diff] [blame] | 268 | $$(PSP_APCB_FILES) \ |
Zheng Bao | c5e28ab | 2020-10-28 11:38:09 +0800 | [diff] [blame] | 269 | $(DEP_FILES) \ |
Marshall Dawson | b768723 | 2020-01-20 19:56:30 -0700 | [diff] [blame] | 270 | $(AMDFWTOOL) \ |
Felix Held | 77a63ef | 2020-09-22 01:23:54 +0200 | [diff] [blame] | 271 | $(obj)/fmap_config.h |
Rob Barnes | b2545cc | 2020-09-09 13:19:09 -0600 | [diff] [blame] | 272 | $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set)) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 273 | rm -f $@ |
| 274 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 275 | $(AMDFWTOOL) \ |
Martin Roth | 7c4956d | 2020-09-01 11:05:53 -0600 | [diff] [blame] | 276 | $(OPT_PSPBTLDR_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 277 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 278 | $(OPT_APOB0_NV_SIZE) \ |
| 279 | $(OPT_APOB0_NV_BASE) \ |
Martin Roth | 7c4956d | 2020-09-01 11:05:53 -0600 | [diff] [blame] | 280 | $(OPT_VERSTAGE_FILE) \ |
Martin Roth | fe87d76 | 2020-09-01 11:04:21 -0600 | [diff] [blame] | 281 | $(OPT_VERSTAGE_SIG_FILE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 282 | --location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \ |
| 283 | --output $@ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 284 | |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 285 | $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 286 | rm -f $@ |
| 287 | @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" |
Felix Held | 4667322 | 2020-04-04 02:37:04 +0200 | [diff] [blame] | 288 | $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ |
Marshall Dawson | 6261141 | 2019-06-19 11:46:06 -0600 | [diff] [blame] | 289 | --maxsize $(PSP_BIOSBIN_SIZE) |
| 290 | |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 291 | $(obj)/amdfw_a.rom: $(obj)/amdfw.rom |
| 292 | rm -f $@ |
| 293 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 294 | $(AMDFWTOOL) \ |
| 295 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 296 | $(OPT_APOB_NV_SIZE) \ |
| 297 | $(OPT_APOB_NV_BASE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 298 | --location $(shell printf "%#x" $(CONFIG_PICASSO_FW_A_POSITION)) \ |
| 299 | --anywhere \ |
| 300 | --output $@ |
| 301 | |
| 302 | $(obj)/amdfw_b.rom: $(obj)/amdfw.rom |
| 303 | rm -f $@ |
| 304 | @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" |
| 305 | $(AMDFWTOOL) \ |
| 306 | $(AMDFW_COMMON_ARGS) \ |
Martin Roth | e2d0ba0 | 2020-07-29 16:37:57 -0600 | [diff] [blame] | 307 | $(OPT_APOB_NV_SIZE) \ |
| 308 | $(OPT_APOB_NV_BASE) \ |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 309 | --location $(shell printf "%#x" $(CONFIG_PICASSO_FW_B_POSITION)) \ |
| 310 | --anywhere \ |
| 311 | --output $@ |
| 312 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 313 | cbfs-files-y += apu/amdfw |
| 314 | apu/amdfw-file := $(obj)/amdfw.rom |
Marshall Dawson | bc4c903 | 2019-06-11 12:18:20 -0600 | [diff] [blame] | 315 | apu/amdfw-position := $(PICASSO_FWM_POSITION) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 316 | apu/amdfw-type := raw |
| 317 | |
Martin Roth | 9aa8d11 | 2020-06-04 21:31:41 -0600 | [diff] [blame] | 318 | ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) |
| 319 | cbfs-files-y += apu/amdfw_a |
| 320 | apu/amdfw_a-file := $(obj)/amdfw_a.rom |
| 321 | apu/amdfw_a-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_A_POSITION)) |
| 322 | apu/amdfw_a-type := raw |
| 323 | |
| 324 | cbfs-files-y += apu/amdfw_b |
| 325 | apu/amdfw_b-file := $(obj)/amdfw_b.rom |
| 326 | apu/amdfw_b-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_B_POSITION)) |
| 327 | apu/amdfw_b-type := raw |
| 328 | endif |
| 329 | |
Furquan Shaikh | c6d89fb | 2020-05-28 11:21:26 -0700 | [diff] [blame] | 330 | $(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) |
| 331 | |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 332 | cpu_microcode_bins += $(wildcard 3rdparty/amd_blobs/picasso/PSP/UcodePatch_*.bin) |
| 333 | |
Martin Roth | 1f33762 | 2019-04-22 16:08:31 -0600 | [diff] [blame] | 334 | endif # ($(CONFIG_SOC_AMD_PICASSO),y) |