blob: 43bb32e7f0b32c99b8757bcf669c5cf440ff2ec2 [file] [log] [blame]
Felix Held4a8cd722020-04-18 22:26:39 +02001# SPDX-License-Identifier: BSD-3-Clause
Felix Held4a8cd722020-04-18 22:26:39 +02002
Martin Roth1f337622019-04-22 16:08:31 -06003ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
Martin Roth5c354b92019-04-22 14:55:16 -06004
5subdirs-y += ../../../cpu/amd/mtrr/
6subdirs-y += ../../../cpu/x86/tsc
7subdirs-y += ../../../cpu/x86/lapic
8subdirs-y += ../../../cpu/x86/cache
9subdirs-y += ../../../cpu/x86/mtrr
10subdirs-y += ../../../cpu/x86/pae
11subdirs-y += ../../../cpu/x86/smm
12
Felix Held46673222020-04-04 02:37:04 +020013bootblock-y += bootblock/pre_c.S
14bootblock-y += bootblock/bootblock.c
15bootblock-y += southbridge.c
16bootblock-y += i2c.c
17bootblock-$(CONFIG_PICASSO_UART) += uart.c
18bootblock-y += tsc_freq.c
19bootblock-y += gpio.c
20bootblock-y += smi_util.c
Furquan Shaikh033aa0d2020-05-09 14:26:37 -070021bootblock-y += config.c
Felix Held46673222020-04-04 02:37:04 +020022
Martin Roth5c354b92019-04-22 14:55:16 -060023romstage-y += i2c.c
24romstage-y += romstage.c
Martin Roth5c354b92019-04-22 14:55:16 -060025romstage-y += gpio.c
Martin Roth5c354b92019-04-22 14:55:16 -060026romstage-y += pmutil.c
Kyösti Mälkki047a9e42019-08-03 21:28:40 +030027romstage-y += memmap.c
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060028romstage-$(CONFIG_PICASSO_UART) += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060029romstage-y += tsc_freq.c
30romstage-y += southbridge.c
Martin Roth5c354b92019-04-22 14:55:16 -060031romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
Martin Roth97bd2a72020-02-17 13:17:19 -070032romstage-y += soc_util.c
Marshall Dawson5a73fc32020-01-24 09:42:57 -070033romstage-y += psp.c
Raul E Rangele04c2c42020-04-30 16:26:30 -060034romstage-y += mtrr.c
Furquan Shaikh033aa0d2020-05-09 14:26:37 -070035romstage-y += config.c
Martin Roth5c354b92019-04-22 14:55:16 -060036
37verstage-y += gpio.c
38verstage-y += i2c.c
Martin Roth5c354b92019-04-22 14:55:16 -060039verstage-y += pmutil.c
Furquan Shaikh033aa0d2020-05-09 14:26:37 -070040verstage-y += config.c
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060041verstage-$(CONFIG_PICASSO_UART) += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060042verstage-y += tsc_freq.c
Martin Roth5c354b92019-04-22 14:55:16 -060043
Martin Roth5c354b92019-04-22 14:55:16 -060044ramstage-y += i2c.c
45ramstage-y += chip.c
46ramstage-y += cpu.c
47ramstage-y += mca.c
Martin Roth5c354b92019-04-22 14:55:16 -060048ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
49ramstage-y += gpio.c
Martin Roth5c354b92019-04-22 14:55:16 -060050ramstage-y += southbridge.c
51ramstage-y += northbridge.c
52ramstage-y += pmutil.c
Marshall Dawson3edc9e22019-08-16 08:45:20 -060053ramstage-y += acp.c
Martin Roth5c354b92019-04-22 14:55:16 -060054ramstage-y += sata.c
Kyösti Mälkki047a9e42019-08-03 21:28:40 +030055ramstage-y += memmap.c
Martin Roth5c354b92019-04-22 14:55:16 -060056ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
57ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060058ramstage-$(CONFIG_PICASSO_UART) += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060059ramstage-y += usb.c
60ramstage-y += tsc_freq.c
Martin Roth5c354b92019-04-22 14:55:16 -060061ramstage-y += finalize.c
Martin Roth97bd2a72020-02-17 13:17:19 -070062ramstage-y += soc_util.c
Marshall Dawson5a73fc32020-01-24 09:42:57 -070063ramstage-y += psp.c
Aaron Durbin89e51e62020-04-09 14:16:55 -060064ramstage-y += fsp_params.c
Furquan Shaikh033aa0d2020-05-09 14:26:37 -070065ramstage-y += config.c
Martin Roth5c354b92019-04-22 14:55:16 -060066
Kyösti Mälkki9db39872019-12-13 18:11:05 +020067all-y += reset.c
68
Martin Roth5c354b92019-04-22 14:55:16 -060069smm-y += smihandler.c
70smm-y += smi_util.c
71smm-y += tsc_freq.c
72smm-$(CONFIG_DEBUG_SMI) += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060073smm-y += gpio.c
Marshall Dawson5a73fc32020-01-24 09:42:57 -070074smm-y += psp.c
Furquan Shaikh033aa0d2020-05-09 14:26:37 -070075smm-y += config.c
Martin Roth5c354b92019-04-22 14:55:16 -060076
Martin Rothd7e3ead2019-04-22 16:32:58 -060077CPPFLAGS_common += -I$(src)/soc/amd/picasso
78CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
79CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
Marshall Dawson00a22082020-01-20 23:05:31 -070080CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
Martin Roth5c354b92019-04-22 14:55:16 -060081
82# ROMSIG Normally At ROMBASE + 0x20000
83# Overridden by CONFIG_AMD_FWM_POSITION_INDEX
84# +-----------+---------------+----------------+------------+
Marshall Dawson62611412019-06-19 11:46:06 -060085# |0x55AA55AA | | | |
Martin Roth5c354b92019-04-22 14:55:16 -060086# +-----------+---------------+----------------+------------+
Marshall Dawson62611412019-06-19 11:46:06 -060087# | | PSPDIR ADDR | BIOSDIR ADDR |
88# +-----------+---------------+----------------+
89
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060090PICASSO_FWM_POSITION=$(call int-add, \
Martin Roth5c354b92019-04-22 14:55:16 -060091 $(call int-subtract, 0xffffffff \
92 $(call int-shift-left, \
93 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
94
Marshall Dawson62611412019-06-19 11:46:06 -060095#
96# PSP Directory Table items
97#
98# Certain ordering requirements apply, however these are ensured by amdfwtool.
99# For more information see "AMD Platform Security Processor BIOS Architecture
100# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
101#
102
103# type = 0x0
Martin Roth5c354b92019-04-22 14:55:16 -0600104FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
Martin Roth5c354b92019-04-22 14:55:16 -0600105
Marshall Dawson62611412019-06-19 11:46:06 -0600106# type = 0x1
107ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
108PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_WL_RV.sbin
109else
110PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_RV.sbin
Martin Roth5c354b92019-04-22 14:55:16 -0600111endif
112
Furquan Shaikh90944102020-04-23 23:34:17 -0700113# types = 0x8 and 0x12
Marshall Dawson62611412019-06-19 11:46:06 -0600114PSP_SMUFW1_SUB1_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmwareRV2.csbin
115PSP_SMUFW1_SUB2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmwarePCO.csbin
116PSP_SMUFW2_SUB1_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2RV2.csbin
117PSP_SMUFW2_SUB2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2PCO.csbin
Martin Roth5c354b92019-04-22 14:55:16 -0600118
Furquan Shaikh577db022020-04-24 15:52:04 -0700119ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
Marshall Dawson62611412019-06-19 11:46:06 -0600120# type = 0x9
121PSP_SEC_DBG_KEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RavenSecureDebug_PublicKey.bin
Furquan Shaikh577db022020-04-24 15:52:04 -0700122# type = 0x13
123PSP_SEC_DEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/secure_unlock_prod_RV.sbin
Furquan Shaikh318e5832020-04-24 14:04:07 -0700124# Enable secure debug unlock
125PSP_SOFTFUSE_BITS += 0
Furquan Shaikh577db022020-04-24 15:52:04 -0700126PSP_TOKEN_UNLOCK="--token-unlock"
127endif
Martin Roth5c354b92019-04-22 14:55:16 -0600128
Marshall Dawson62611412019-06-19 11:46:06 -0600129ifeq ($(CONFIG_USE_PSPSCUREOS),y)
Furquan Shaikh4e8b6392020-04-23 19:48:28 -0700130# types = 0x2
Marshall Dawson62611412019-06-19 11:46:06 -0600131PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/psp_os_combined_prod_RV.sbin
Martin Roth5c354b92019-04-22 14:55:16 -0600132endif
133
Marshall Dawson62611412019-06-19 11:46:06 -0600134# type = 0x21
135PSP_IKEK_FILE=$(top)/$(FIRMWARE_LOCATE)/PspIkekRV.bin
136
137# type = 0x24
138PSP_SECG1_FILE=$(top)/$(FIRMWARE_LOCATE)/security_policy_RV2_FP5_AM4.sbin
139PSP_SECG2_FILE=$(top)/$(FIRMWARE_LOCATE)/security_policy_PCO_FP5_AM4.sbin
140
141ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
142# type = 0x25
143PSP_MP2FW1_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2I2CFWRV2.sbin
144PSP_MP2FW2_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2I2CFWPCO.sbin
145# BIOS type = 0x6a
146PSP_MP2CFG_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2FWConfig.sbin
147else
Furquan Shaikh318e5832020-04-24 14:04:07 -0700148# Disable MP2 firmware loading
149PSP_SOFTFUSE_BITS += 29
Martin Roth5c354b92019-04-22 14:55:16 -0600150endif
151
Marshall Dawson62611412019-06-19 11:46:06 -0600152# type = 0x28
153PSP_DRIVERS_FILE=$(top)/$(FIRMWARE_LOCATE)/drv_sys_prod_RV.sbin
154
155ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
156PSP_S0I3_FILE=$(top)/$(FIRMWARE_LOCATE)/dr_agesa_prod_RV.sbin
157endif
158
159# types = 0x30 - 0x37
160PSP_ABL0_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader0_prod_RV.csbin
161PSP_ABL1_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader1_prod_RV.csbin
162PSP_ABL2_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader2_prod_RV.csbin
163PSP_ABL3_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader3_prod_RV.csbin
164PSP_ABL4_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader4_prod_RV.csbin
165PSP_ABL5_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader5_prod_RV.csbin
166PSP_ABL6_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader6_prod_RV.csbin
167PSP_ABL7_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader7_prod_RV.csbin
168
169# type = 0x3a
170ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
171PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
172endif
173
174#
175# BIOS Directory Table items - proper ordering is managed by amdfwtool
176#
177
178# type = 0x60
Marshall Dawson4357a822019-09-25 11:07:56 -0600179PSP_APCB0_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB_FILE))
180PSP_APCB1_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB1_FILE))
181PSP_APCB2_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB2_FILE))
182PSP_APCB3_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB3_FILE))
183PSP_APCB4_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB4_FILE))
Marshall Dawson62611412019-06-19 11:46:06 -0600184
185# type = 0x61
186PSP_APOB_BASE=$(CONFIG_PSP_APOB_DESTINATION)
187
188# type = 0x62
189PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
Felix Held46673222020-04-04 02:37:04 +0200190PSP_ELF_FILE=$(objcbfs)/bootblock.elf
191# TODO(b/154957411): Refactor amdfwtool to extract the address and size from
192# the elf file.
193PSP_BIOSBIN_SIZE=$(CONFIG_C_ENV_BOOTBLOCK_SIZE)
194# This address must match the BOOTBLOCK logic in arch/x86/memlayout.ld.
195PSP_BIOSBIN_DEST=$(shell printf "%x" $(call int-subtract, $(call int-add, $(CONFIG_X86_RESET_VECTOR) 0x10) $(PSP_BIOSBIN_SIZE)))
Marshall Dawson62611412019-06-19 11:46:06 -0600196
197# type = 0x63
Marshall Dawsoncca74862019-12-12 12:38:45 -0700198ifeq ($(CONFIG_HAVE_ACPI_RESUME),y)
Marshall Dawson62611412019-06-19 11:46:06 -0600199PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS)
200PSP_APOBNV_SIZE=$(CONFIG_PSP_APOB_NV_SIZE)
Marshall Dawsoncca74862019-12-12 12:38:45 -0700201endif
Marshall Dawson62611412019-06-19 11:46:06 -0600202
203# type2 = 0x64, 0x65
204PSP_PMUI_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin
205PSP_PMUI_FILE2=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Imem.csbin
206PSP_PMUI_FILE3=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Imem.csbin
207PSP_PMUI_FILE4=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Imem.csbin
208PSP_PMUD_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin
209PSP_PMUD_FILE2=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Dmem.csbin
210PSP_PMUD_FILE3=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin
211PSP_PMUD_FILE4=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin
212
213# type = 0x66
214PSP_UCODE_FILE1=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_PCO_B1.bin
215PSP_UCODE_FILE2=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_PCO_B0.bin
216PSP_UCODE_FILE3=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_RV2_A0.bin
217
Furquan Shaikh318e5832020-04-24 14:04:07 -0700218# type = 0xb - See #55758 (NDA) for bit definitions.
219PSP_SOFTFUSE_BITS += 28
220
221# Helper function to return a value with given bit set
222set-bit=$(call int-shift-left, 1 $(call _toint,$1))
223PSP_SOFTFUSE=$(shell A=$(call int-add, \
224 $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A)
225
Marshall Dawson62611412019-06-19 11:46:06 -0600226#
227# Build the arguments to amdfwtool (order is unimportant). Missing file names
228# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
229#
230
Martin Roth5c354b92019-04-22 14:55:16 -0600231add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
232
Martin Roth5c354b92019-04-22 14:55:16 -0600233OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey)
234OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader)
Marshall Dawson62611412019-06-19 11:46:06 -0600235OPT_SMUFW1_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB1_FILE), --subprogram 1 --smufirmware)
236OPT_SMUFW1_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB2_FILE), --subprogram 2 --smufirmware)
237OPT_SMUFW2_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB1_FILE), --subprogram 1 --smufirmware2)
238OPT_SMUFW2_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB2_FILE), --subprogram 2 --smufirmware2)
239OPT_PSP_SEC_DBG_KEY_FILE=$(call add_opt_prefix, $(PSP_SEC_DBG_KEY_FILE), --securedebug)
Furquan Shaikh577db022020-04-24 15:52:04 -0700240OPT_TOKEN_UNLOCK=$(call add_opt_prefix, $(PSP_TOKEN_UNLOCK), "")
Marshall Dawson62611412019-06-19 11:46:06 -0600241OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
Martin Roth5c354b92019-04-22 14:55:16 -0600242OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos)
Marshall Dawson62611412019-06-19 11:46:06 -0600243OPT_SEC_DEBUG_FILE=$(call add_opt_prefix, $(PSP_SEC_DEBUG_FILE), --secdebug)
244OPT_IKEK_FILE=$(call add_opt_prefix, $(PSP_IKEK_FILE), --ikek)
245OPT_SECG1_FILE=$(call add_opt_prefix, $(PSP_SECG1_FILE), --subprog 1 --sec-gasket)
246OPT_SECG2_FILE=$(call add_opt_prefix, $(PSP_SECG2_FILE), --subprog 2 --sec-gasket)
247OPT_MP2FW1_FILE=$(call add_opt_prefix, $(PSP_MP2FW1_FILE), --subprog 1 --mp2-fw)
248OPT_MP2FW2_FILE=$(call add_opt_prefix, $(PSP_MP2FW2_FILE), --subprog 2 --mp2-fw)
249OPT_DRIVERS_FILE=$(call add_opt_prefix, $(PSP_DRIVERS_FILE), --drv-entry-pts)
250OPT_PSP_S0I3_FILE=$(call add_opt_prefix, $(PSP_S0I3_FILE), --s0i3drv)
251OPT_ABL0_FILE=$(call add_opt_prefix, $(PSP_ABL0_FILE), --abl-image)
252OPT_ABL1_FILE=$(call add_opt_prefix, $(PSP_ABL1_FILE), --abl-image)
253OPT_ABL2_FILE=$(call add_opt_prefix, $(PSP_ABL2_FILE), --abl-image)
254OPT_ABL3_FILE=$(call add_opt_prefix, $(PSP_ABL3_FILE), --abl-image)
255OPT_ABL4_FILE=$(call add_opt_prefix, $(PSP_ABL4_FILE), --abl-image)
256OPT_ABL5_FILE=$(call add_opt_prefix, $(PSP_ABL5_FILE), --abl-image)
257OPT_ABL6_FILE=$(call add_opt_prefix, $(PSP_ABL6_FILE), --abl-image)
258OPT_ABL7_FILE=$(call add_opt_prefix, $(PSP_ABL7_FILE), --abl-image)
259OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
260
Marshall Dawson4357a822019-09-25 11:07:56 -0600261OPT_PSP_APCB0_FILE=$(call add_opt_prefix, $(PSP_APCB0_FILE), --instance 0 --apcb)
262OPT_PSP_APCB1_FILE=$(call add_opt_prefix, $(PSP_APCB1_FILE), --instance 1 --apcb)
263OPT_PSP_APCB2_FILE=$(call add_opt_prefix, $(PSP_APCB2_FILE), --instance 2 --apcb)
264OPT_PSP_APCB3_FILE=$(call add_opt_prefix, $(PSP_APCB3_FILE), --instance 3 --apcb)
265OPT_PSP_APCB4_FILE=$(call add_opt_prefix, $(PSP_APCB4_FILE), --instance 4 --apcb)
Marshall Dawson62611412019-06-19 11:46:06 -0600266OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
267OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
268OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
269OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
270OPT_APOBNV_ADDR=$(call add_opt_prefix, $(PSP_APOBNV_BASE), --apob-nv-base)
271OPT_APOBNV_SIZE=$(call add_opt_prefix, $(PSP_APOBNV_SIZE), --apob-nv-size)
272OPT_PSP_PMUI_FILE1=$(call add_opt_prefix, $(PSP_PMUI_FILE1), --subprogram 0 --instance 1 --pmu-inst)
273OPT_PSP_PMUI_FILE2=$(call add_opt_prefix, $(PSP_PMUI_FILE2), --subprogram 0 --instance 4 --pmu-inst)
274OPT_PSP_PMUI_FILE3=$(call add_opt_prefix, $(PSP_PMUI_FILE3), --subprogram 1 --instance 1 --pmu-inst)
275OPT_PSP_PMUI_FILE4=$(call add_opt_prefix, $(PSP_PMUI_FILE4), --subprogram 1 --instance 4 --pmu-inst)
276OPT_PSP_PMUD_FILE1=$(call add_opt_prefix, $(PSP_PMUD_FILE1), --subprogram 0 --instance 1 --pmu-data)
277OPT_PSP_PMUD_FILE2=$(call add_opt_prefix, $(PSP_PMUD_FILE2), --subprogram 0 --instance 4 --pmu-data)
278OPT_PSP_PMUD_FILE3=$(call add_opt_prefix, $(PSP_PMUD_FILE3), --subprogram 1 --instance 1 --pmu-data)
279OPT_PSP_PMUD_FILE4=$(call add_opt_prefix, $(PSP_PMUD_FILE4), --subprogram 1 --instance 4 --pmu-data)
280OPT_PSP_UCODE_FILE1=$(call add_opt_prefix, $(PSP_UCODE_FILE1), --instance 0 --ucode)
281OPT_PSP_UCODE_FILE2=$(call add_opt_prefix, $(PSP_UCODE_FILE2), --instance 1 --ucode)
282OPT_PSP_UCODE_FILE3=$(call add_opt_prefix, $(PSP_UCODE_FILE3), --instance 2 --ucode)
283OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config)
Martin Roth5c354b92019-04-22 14:55:16 -0600284
Marshall Dawson19ea0162019-06-11 12:34:04 -0600285$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
Martin Roth5c354b92019-04-22 14:55:16 -0600286 $(call strip_quotes, $(PSPBTLDR_FILE)) \
Martin Roth5c354b92019-04-22 14:55:16 -0600287 $(call strip_quotes, $(PSPSCUREOS_FILE)) \
Marshall Dawson62611412019-06-19 11:46:06 -0600288 $(call strip_quotes, $(PSP_SEC_DBG_KEY_FILE)) \
Marshall Dawson4357a822019-09-25 11:07:56 -0600289 $(call strip_quotes, $(PSP_APCB0_FILE)) \
290 $(call strip_quotes, $(PSP_APCB1_FILE)) \
291 $(call strip_quotes, $(PSP_APCB2_FILE)) \
292 $(call strip_quotes, $(PSP_APCB3_FILE)) \
293 $(call strip_quotes, $(PSP_APCB4_FILE)) \
Marshall Dawson62611412019-06-19 11:46:06 -0600294 $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
295 $(call strip_quotes, $(PSP_PMUI_FILE1)) \
296 $(call strip_quotes, $(PSP_PMUI_FILE2)) \
297 $(call strip_quotes, $(PSP_PMUI_FILE3)) \
298 $(call strip_quotes, $(PSP_PMUI_FILE4)) \
299 $(call strip_quotes, $(PSP_PMUD_FILE1)) \
300 $(call strip_quotes, $(PSP_PMUD_FILE2)) \
301 $(call strip_quotes, $(PSP_PMUD_FILE3)) \
302 $(call strip_quotes, $(PSP_PMUD_FILE4)) \
303 $(call strip_quotes, $(PSP_UCODE_FILE1)) \
304 $(call strip_quotes, $(PSP_UCODE_FILE2)) \
305 $(call strip_quotes, $(PSP_UCODE_FILE3)) \
306 $(call strip_quotes, $(PSP_MP2CFG_FILE)) \
307 $(call strip_quotes, $(PSP_SMUFW1_SUB1_FILE)) \
308 $(call strip_quotes, $(PSP_SMUFW1_SUB2_FILE)) \
309 $(call strip_quotes, $(PSP_SMUFW2_SUB1_FILE)) \
310 $(call strip_quotes, $(PSP_SMUFW2_SUB2_FILE)) \
311 $(call strip_quotes, $(PSP_ABL0_FILE)) \
312 $(call strip_quotes, $(PSP_ABL1_FILE)) \
313 $(call strip_quotes, $(PSP_ABL2_FILE)) \
314 $(call strip_quotes, $(PSP_ABL3_FILE)) \
315 $(call strip_quotes, $(PSP_ABL4_FILE)) \
316 $(call strip_quotes, $(PSP_ABL5_FILE)) \
317 $(call strip_quotes, $(PSP_ABL6_FILE)) \
318 $(call strip_quotes, $(PSP_ABL7_FILE)) \
319 $(call strip_quotes, $(PSP_WHITELIST_FILE)) \
320 $(call strip_quotes, $(PSP_SECG1_FILE)) \
321 $(call strip_quotes, $(PSP_SECG2_FILE)) \
322 $(call_strip_quotes, $(PSP_DRIVERS_FILE)) \
323 $(call_strip_quotes, $(PSP_S0I3_FILE)) \
324 $(call_strip_quotes, $(PSP_IKEK_FILE)) \
325 $(call_strip_quotes, $(PSP_SEC_DEBUG_FILE)) \
Martin Roth5c354b92019-04-22 14:55:16 -0600326 $(AMDFWTOOL)
327 rm -f $@
328 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
329 $(AMDFWTOOL) \
Martin Roth5c354b92019-04-22 14:55:16 -0600330 $(OPT_AMD_PUBKEY_FILE) \
331 $(OPT_PSPBTLDR_FILE) \
Martin Roth5c354b92019-04-22 14:55:16 -0600332 $(OPT_PSPSCUREOS_FILE) \
Marshall Dawson62611412019-06-19 11:46:06 -0600333 $(OPT_PSP_SEC_DBG_KEY_FILE) \
Marshall Dawson62611412019-06-19 11:46:06 -0600334 $(OPT_SMUFW1_SUB2_FILE) \
335 $(OPT_SMUFW2_SUB2_FILE) \
336 $(OPT_SMUFW1_SUB1_FILE) \
337 $(OPT_SMUFW2_SUB1_FILE) \
Marshall Dawson4357a822019-09-25 11:07:56 -0600338 $(OPT_PSP_APCB0_FILE) \
339 $(OPT_PSP_APCB1_FILE) \
340 $(OPT_PSP_APCB2_FILE) \
341 $(OPT_PSP_APCB3_FILE) \
342 $(OPT_PSP_APCB4_FILE) \
Marshall Dawson62611412019-06-19 11:46:06 -0600343 $(OPT_APOB_ADDR) \
344 $(OPT_APOBNV_ADDR) \
345 $(OPT_APOBNV_SIZE) \
346 $(OPT_PSP_BIOSBIN_FILE) \
347 $(OPT_PSP_BIOSBIN_DEST) \
348 $(OPT_PSP_BIOSBIN_SIZE) \
349 $(OPT_PSP_SOFTFUSE) \
350 $(OPT_PSP_PMUI_FILE1) \
351 $(OPT_PSP_PMUI_FILE2) \
352 $(OPT_PSP_PMUI_FILE3) \
353 $(OPT_PSP_PMUI_FILE4) \
354 $(OPT_PSP_PMUD_FILE1) \
355 $(OPT_PSP_PMUD_FILE2) \
356 $(OPT_PSP_PMUD_FILE3) \
357 $(OPT_PSP_PMUD_FILE4) \
358 $(OPT_PSP_UCODE_FILE1) \
359 $(OPT_PSP_UCODE_FILE2) \
360 $(OPT_PSP_UCODE_FILE3) \
361 $(OPT_MP2CFG_FILE) \
362 $(OPT_ABL0_FILE) \
363 $(OPT_ABL1_FILE) \
364 $(OPT_ABL2_FILE) \
365 $(OPT_ABL3_FILE) \
366 $(OPT_ABL4_FILE) \
367 $(OPT_ABL5_FILE) \
368 $(OPT_ABL6_FILE) \
369 $(OPT_ABL7_FILE) \
370 $(OPT_WHITELIST_FILE) \
371 $(OPT_SECG1_FILE) \
372 $(OPT_SECG2_FILE) \
373 $(OPT_MP2FW1_FILE) \
374 $(OPT_MP2FW2_FILE) \
375 $(OPT_DRIVERS_FILE) \
376 $(OPT_PSP_S0I3_FILE) \
377 $(OPT_IKEK_FILE) \
378 $(OPT_SEC_DEBUG_FILE) \
Martin Roth5c354b92019-04-22 14:55:16 -0600379 --combo-capable \
Furquan Shaikh577db022020-04-24 15:52:04 -0700380 $(OPT_TOKEN_UNLOCK) \
Martin Roth5c354b92019-04-22 14:55:16 -0600381 --flashsize $(CONFIG_ROM_SIZE) \
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600382 --location $(shell printf "0x%x" $(PICASSO_FWM_POSITION)) \
Martin Roth5c354b92019-04-22 14:55:16 -0600383 --output $@
384
Felix Held46673222020-04-04 02:37:04 +0200385$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600386 rm -f $@
387 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
Felix Held46673222020-04-04 02:37:04 +0200388 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
Marshall Dawson62611412019-06-19 11:46:06 -0600389 --maxsize $(PSP_BIOSBIN_SIZE)
390
Martin Roth5c354b92019-04-22 14:55:16 -0600391ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
392PHONY+=add_amdfw
393INTERMEDIATE+=add_amdfw
394
395# Calculate firmware position inside the ROM
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600396PICASSO_FWM_ROM_POSITION=$(call int-add, \
Martin Roth5c354b92019-04-22 14:55:16 -0600397 $(call int-subtract, $(CONFIG_ROM_SIZE) \
398 $(call int-shift-left, \
399 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
400
401add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom
402 printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600403 "$(PICASSO_FWM_ROM_POSITION)"
Marshall Dawson62611412019-06-19 11:46:06 -0600404 dd oflag=seek_bytes \
405 if=$(obj)/amdfw.rom \
406 of=$(obj)/coreboot.pre conv=notrunc \
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600407 seek=$(PICASSO_FWM_ROM_POSITION) >/dev/null 2>&1
Martin Roth5c354b92019-04-22 14:55:16 -0600408
409else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
410
411cbfs-files-y += apu/amdfw
412apu/amdfw-file := $(obj)/amdfw.rom
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600413apu/amdfw-position := $(PICASSO_FWM_POSITION)
Martin Roth5c354b92019-04-22 14:55:16 -0600414apu/amdfw-type := raw
415
416endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
417
Martin Roth1f337622019-04-22 16:08:31 -0600418endif # ($(CONFIG_SOC_AMD_PICASSO),y)