Angel Pons | 2de6bdf | 2020-04-05 13:21:00 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 2 | |
| 3 | #include <cbfs.h> |
| 4 | #include <cbmem.h> |
| 5 | #include <console/console.h> |
Subrata Banik | e5e9439 | 2015-08-22 11:10:22 +0530 | [diff] [blame] | 6 | #include <gpio.h> |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 7 | #include <lib.h> |
| 8 | #include <memory_info.h> |
| 9 | #include <smbios.h> |
| 10 | #include <spd.h> |
| 11 | #include <soc/gpio.h> |
| 12 | #include <soc/romstage.h> |
| 13 | #include <string.h> |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 14 | #include <spd_bin.h> |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 15 | #include "spd_util.h" |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 16 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 17 | __weak uint8_t get_ramid(void) |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 18 | { |
Subrata Banik | e5e9439 | 2015-08-22 11:10:22 +0530 | [diff] [blame] | 19 | gpio_t spd_gpios[] = { |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 20 | GP_SW_80, /* SATA_GP3, RAMID0 */ |
| 21 | GP_SW_67, /* I2C3_SCL, RAMID1 */ |
Subrata Banik | e5e9439 | 2015-08-22 11:10:22 +0530 | [diff] [blame] | 22 | GP_SE_02, /* MF_PLT_CLK1, RAMID2 */ |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 23 | GP_SW_64, /* I2C3_SDA, RAMID3 */ |
Subrata Banik | e5e9439 | 2015-08-22 11:10:22 +0530 | [diff] [blame] | 24 | }; |
| 25 | |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 26 | return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); |
| 27 | } |
| 28 | |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 29 | static void *get_spd_pointer(int *dual) |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 30 | { |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 31 | char *spd_file; |
| 32 | size_t spd_file_len; |
| 33 | int total_spds; |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 34 | int ram_id = 0; |
| 35 | int spd_index = 0; |
| 36 | |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 37 | /* Find the SPD data in CBFS. */ |
Julius Werner | 834b3ec | 2020-03-04 16:52:08 -0800 | [diff] [blame^] | 38 | spd_file = cbfs_map("spd.bin", &spd_file_len); |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 39 | if (!spd_file) |
| 40 | die("SPD data not found."); |
| 41 | |
| 42 | if (spd_file_len < SPD_PAGE_LEN) |
| 43 | die("Missing SPD data."); |
| 44 | total_spds = spd_file_len / SPD_PAGE_LEN; |
| 45 | |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 46 | ram_id = get_ramid(); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 47 | printk(BIOS_DEBUG, "ram_id=%d, total_spds: %d\n", ram_id, total_spds); |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 48 | |
| 49 | spd_index = get_variant_spd_index(ram_id, dual); |
| 50 | if (spd_index >= total_spds) { |
| 51 | printk(BIOS_ERR, "SPD index > total SPDs\n"); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 52 | return NULL; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 53 | } |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 54 | /* Return the serial product data for the RAM */ |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 55 | return &spd_file[SPD_PAGE_LEN * spd_index]; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | /* Copy SPD data for on-board memory */ |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 59 | void spd_memory_init_params(MEMORY_INIT_UPD *memory_params) |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 60 | { |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 61 | void *spd_content; |
| 62 | int dual_channel = 0; |
| 63 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 64 | /* |
| 65 | * Both channels are always present in SPD data. Always use matched |
| 66 | * DIMMs so use the same SPD data for each DIMM. |
| 67 | */ |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 68 | spd_content = get_spd_pointer(&dual_channel); |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 69 | if (CONFIG(DISPLAY_SPD_DATA) && spd_content != NULL) { |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 70 | printk(BIOS_DEBUG, "SPD Data:\n"); |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 71 | hexdump(spd_content, SPD_PAGE_LEN); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 72 | printk(BIOS_DEBUG, "\n"); |
| 73 | } |
| 74 | |
| 75 | /* |
| 76 | * Set SPD and memory configuration: |
| 77 | * Memory type: 0=DimmInstalled, |
| 78 | * 1=SolderDownMemory, |
| 79 | * 2=DimmDisabled |
| 80 | */ |
| 81 | if (spd_content != NULL) { |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 82 | memory_params->PcdMemChannel0Config = 1; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 83 | printk(BIOS_DEBUG, "Channel 0 DIMM soldered down\n"); |
| 84 | if (dual_channel) { |
| 85 | printk(BIOS_DEBUG, "Channel 1 DIMM soldered down\n"); |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 86 | memory_params->PcdMemChannel1Config = 1; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 87 | } else { |
| 88 | printk(BIOS_DEBUG, "Channel 1 DIMM not installed\n"); |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 89 | memory_params->PcdMemChannel1Config = 2; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 90 | } |
| 91 | } |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 92 | |
| 93 | /* Update SPD data */ |
| 94 | if (CONFIG(BOARD_GOOGLE_CYAN)) { |
| 95 | memory_params->PcdMemoryTypeEnable = MEM_DDR3; |
| 96 | memory_params->PcdMemorySpdPtr = (uintptr_t)spd_content; |
| 97 | } else { |
| 98 | memory_params->PcdMemoryTypeEnable = MEM_LPDDR3; |
| 99 | } |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 100 | } |
| 101 | |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 102 | static void set_dimm_info(const uint8_t *spd, struct dimm_info *dimm) |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 103 | { |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 104 | const int spd_capmb[8] = { 1, 2, 4, 8, 16, 32, 64, 0 }; |
| 105 | const int spd_ranks[8] = { 1, 2, 3, 4, -1, -1, -1, -1 }; |
| 106 | const int spd_devw[8] = { 4, 8, 16, 32, -1, -1, -1, -1 }; |
| 107 | const int spd_busw[8] = { 8, 16, 32, 64, -1, -1, -1, -1 }; |
| 108 | |
| 109 | int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 110 | int ranks = spd_ranks[(spd[DDR3_ORGANIZATION] >> 3) & 7]; |
| 111 | int devw = spd_devw[spd[DDR3_ORGANIZATION] & 7]; |
| 112 | int busw = spd_busw[spd[DDR3_BUS_DEV_WIDTH] & 7]; |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 113 | |
| 114 | void *hob_list_ptr; |
| 115 | EFI_HOB_GUID_TYPE *hob_ptr; |
| 116 | FSP_SMBIOS_MEMORY_INFO *memory_info_hob; |
| 117 | const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID; |
| 118 | |
| 119 | /* Locate the memory info HOB, presence validated by raminit */ |
| 120 | hob_list_ptr = fsp_get_hob_list(); |
| 121 | hob_ptr = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr); |
| 122 | if (hob_ptr != NULL) { |
| 123 | memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1); |
| 124 | dimm->ddr_frequency = memory_info_hob->MemoryFrequencyInMHz; |
| 125 | } else { |
| 126 | printk(BIOS_ERR, "Can't get memory info hob pointer\n"); |
| 127 | dimm->ddr_frequency = 0; |
| 128 | } |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 129 | |
| 130 | /* Parse the SPD data to determine the DIMM information */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 131 | if (CONFIG(BOARD_GOOGLE_CYAN)) { |
Elyes HAOUAS | 28114ae | 2018-11-14 17:51:00 +0100 | [diff] [blame] | 132 | dimm->ddr_type = MEMORY_TYPE_DDR3; |
Matt DeVillier | 4f20a4a | 2017-08-20 17:56:48 -0500 | [diff] [blame] | 133 | } else { |
Elyes HAOUAS | 28114ae | 2018-11-14 17:51:00 +0100 | [diff] [blame] | 134 | dimm->ddr_type = MEMORY_TYPE_LPDDR3; |
Matt DeVillier | 4f20a4a | 2017-08-20 17:56:48 -0500 | [diff] [blame] | 135 | } |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 136 | dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */ |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 137 | dimm->mod_type = spd[3] & 0xf; |
Richard Spiegel | 90b3095 | 2018-04-17 10:09:17 -0700 | [diff] [blame] | 138 | strncpy((char *)&dimm->module_part_number[0], (char *)&spd[0x80], |
| 139 | LPDDR3_SPD_PART_LEN); |
| 140 | dimm->module_part_number[LPDDR3_SPD_PART_LEN] = 0; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 141 | dimm->mod_id = *(uint16_t *)&spd[0x94]; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 142 | |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 143 | switch (busw) { |
Ravi Sarawadi | d077b58 | 2015-09-09 14:12:16 -0700 | [diff] [blame] | 144 | default: |
Matt DeVillier | 869f22f | 2017-08-24 14:47:28 -0500 | [diff] [blame] | 145 | case 8: |
| 146 | dimm->bus_width = MEMORY_BUS_WIDTH_8; |
| 147 | break; |
| 148 | |
| 149 | case 16: |
| 150 | dimm->bus_width = MEMORY_BUS_WIDTH_16; |
| 151 | break; |
| 152 | |
| 153 | case 32: |
| 154 | dimm->bus_width = MEMORY_BUS_WIDTH_32; |
| 155 | break; |
| 156 | |
| 157 | case 64: |
| 158 | dimm->bus_width = MEMORY_BUS_WIDTH_64; |
| 159 | break; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 160 | } |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 161 | } |
| 162 | |
| 163 | void mainboard_save_dimm_info(struct romstage_params *params) |
| 164 | { |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 165 | const void *spd_content; |
| 166 | int dual_channel; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 167 | struct dimm_info *dimm; |
| 168 | struct memory_info *mem_info; |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 169 | |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 170 | spd_content = get_spd_pointer(&dual_channel); |
| 171 | if (spd_content == NULL) |
| 172 | return; |
| 173 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 174 | /* |
| 175 | * Allocate CBMEM area for DIMM information used to populate SMBIOS |
| 176 | * table 17 |
| 177 | */ |
| 178 | mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info)); |
Julius Werner | 540a980 | 2019-12-09 13:03:29 -0800 | [diff] [blame] | 179 | printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 180 | if (mem_info == NULL) |
| 181 | return; |
| 182 | memset(mem_info, 0, sizeof(*mem_info)); |
| 183 | |
| 184 | /* Describe the first channel memory */ |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 185 | dimm = &mem_info->dimm[0]; |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 186 | set_dimm_info(spd_content, dimm); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 187 | mem_info->dimm_cnt = 1; |
| 188 | |
| 189 | /* Describe the second channel memory */ |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 190 | if (dual_channel) { |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 191 | dimm = &mem_info->dimm[1]; |
Nico Huber | 85f0b05 | 2019-05-04 17:06:06 +0200 | [diff] [blame] | 192 | set_dimm_info(spd_content, dimm); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 193 | dimm->channel_num = 1; |
| 194 | mem_info->dimm_cnt = 2; |
| 195 | } |
| 196 | } |