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review.coreboot.org / coreboot / 806fa2463f16d32f98cff6437576a5efe2874ece / . / src / soc / intel / broadwell / minihd.c
blob: 5014b08e7bf6d5d5e0b1bf335fc99c9300cc3990 [file] [log] [blame]
Duncan Lauriec88c54c2014-04-30 16:36:13 -0700[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Copyright (C) 2008-2009 coresystems GmbH
6 * Copyright (C) 2014 Google Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Duncan Lauriec88c54c2014-04-30 16:36:13 -0700[diff] [blame]16 */
17
18#include <console/console.h>
19#include <device/device.h>
20#include <device/pci.h>
21#include <device/pci_ids.h>
22#include <device/pci_ops.h>
23#include <arch/io.h>
24#include <delay.h>
25#include <stdlib.h>
26#include <soc/intel/common/hda_verb.h>
Julius Werner4ee4bd52014-10-20 13:46:39 -0700[diff] [blame]27#include <soc/ramstage.h>
Duncan Lauriec88c54c2014-04-30 16:36:13 -0700[diff] [blame]28
29static const u32 minihd_verb_table[] = {
30 /* coreboot specific header */
31 0x80862807, // Codec Vendor / Device ID: Intel Mini-HD
32 0x00000000, // Subsystem ID
33 0x00000004, // Number of jacks
34
35 /* Enable 3rd Pin and Converter Widget */
36 0x00878101,
37
38 /* Pin Widget 5 - PORT B */
39 0x00571C10,
40 0x00571D00,
41 0x00571E56,
42 0x00571F18,
43
44 /* Pin Widget 6 - PORT C */
45 0x00671C20,
46 0x00671D00,
47 0x00671E56,
48 0x00671F18,
49
50 /* Pin Widget 7 - PORT D */
51 0x00771C30,
52 0x00771D00,
53 0x00771E56,
54 0x00771F18,
55
56 /* Disable 3rd Pin and Converter Widget */
57 0x00878100,
58
59 /* Dummy entries to fill out the table */
60 0x00878100,
61 0x00878100,
62};
63
64static void minihd_init(struct device *dev)
65{
66 struct resource *res;
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800[diff] [blame]67 u8 *base, reg32;
Duncan Lauriec88c54c2014-04-30 16:36:13 -0700[diff] [blame]68 int codec_mask, i;
69
70 /* Find base address */
71 res = find_resource(dev, PCI_BASE_ADDRESS_0);
72 if (!res)
73 return;
74
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800[diff] [blame]75 base = res2mmio(res, 0, 0);
76 printk(BIOS_DEBUG, "Mini-HD: base = %p\n", base);
Duncan Lauriec88c54c2014-04-30 16:36:13 -0700[diff] [blame]77
78 /* Set Bus Master */
79 reg32 = pci_read_config32(dev, PCI_COMMAND);
80 pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
81
82 /* Mini-HD configuration */
83 reg32 = read32(base + 0x100c);
84 reg32 &= 0xfffc0000;
85 reg32 |= 0x4;
86 write32(base + 0x100c, reg32);
87
88 reg32 = read32(base + 0x1010);
89 reg32 &= 0xfffc0000;
90 reg32 |= 0x4b;
91 write32(base + 0x1010, reg32);
92
93 /* Init the codec and write the verb table */
94 codec_mask = hda_codec_detect(base);
95
96 if (codec_mask) {
97 for (i = 3; i >= 0; i--) {
98 if (codec_mask & (1 << i))
99 hda_codec_init(base, i,
100 sizeof(minihd_verb_table),
101 minihd_verb_table);
102 }
103 }
104}
105
106static struct device_operations minihd_ops = {
107 .read_resources = &pci_dev_read_resources,
108 .set_resources = &pci_dev_set_resources,
109 .enable_resources = &pci_dev_enable_resources,
110 .init = &minihd_init,
111 .ops_pci = &broadwell_pci_ops,
112};
113
114static const unsigned short pci_device_ids[] = {
115 0x0a0c, /* Haswell */
116 0x160c, /* Broadwell */
117 0
118};
119
120static const struct pci_driver minihd_driver __pci_driver = {
121 .ops = &minihd_ops,
122 .vendor = PCI_VENDOR_ID_INTEL,
123 .devices = pci_device_ids,
124};