Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <bootstate.h> |
| 17 | #include <cbmem.h> |
| 18 | #include <console/console.h> |
| 19 | #include <stdint.h> |
| 20 | #include <elog.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 21 | #include <soc/lpc.h> |
| 22 | #include <soc/pm.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 23 | |
| 24 | static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) |
| 25 | { |
| 26 | int i; |
| 27 | |
| 28 | gpe0_sts &= gpe0_en; |
| 29 | |
| 30 | for (i = 0; i <= 31; i++) { |
| 31 | if (gpe0_sts & (1 << i)) |
| 32 | elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); |
| 33 | } |
| 34 | } |
| 35 | |
| 36 | static void pch_log_wake_source(struct chipset_power_state *ps) |
| 37 | { |
| 38 | /* Power Button */ |
| 39 | if (ps->pm1_sts & PWRBTN_STS) |
| 40 | elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0); |
| 41 | |
| 42 | /* RTC */ |
| 43 | if (ps->pm1_sts & RTC_STS) |
| 44 | elog_add_event_wake(ELOG_WAKE_SOURCE_RTC, 0); |
| 45 | |
| 46 | /* PCI Express (TODO: determine wake device) */ |
| 47 | if (ps->pm1_sts & PCIEXPWAK_STS) |
| 48 | elog_add_event_wake(ELOG_WAKE_SOURCE_PCIE, 0); |
| 49 | |
| 50 | /* PME (TODO: determine wake device) */ |
| 51 | if (ps->gpe0_sts[GPE_STD] & PME_STS) |
| 52 | elog_add_event_wake(ELOG_WAKE_SOURCE_PME, 0); |
| 53 | |
| 54 | /* Internal PME (TODO: determine wake device) */ |
| 55 | if (ps->gpe0_sts[GPE_STD] & PME_B0_STS) |
| 56 | elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0); |
| 57 | |
| 58 | /* SMBUS Wake */ |
| 59 | if (ps->gpe0_sts[GPE_STD] & SMB_WAK_STS) |
| 60 | elog_add_event_wake(ELOG_WAKE_SOURCE_SMBUS, 0); |
| 61 | |
Duncan Laurie | cdcc9a4 | 2014-09-29 08:38:04 -0700 | [diff] [blame] | 62 | /* GPIO27 */ |
| 63 | if (ps->gpe0_sts[GPE_STD] & GP27_STS) |
| 64 | elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, 27); |
| 65 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 66 | /* Log GPIO events in set 1-3 */ |
| 67 | pch_log_gpio_gpe(ps->gpe0_sts[GPE_31_0], ps->gpe0_en[GPE_31_0], 0); |
| 68 | pch_log_gpio_gpe(ps->gpe0_sts[GPE_63_32], ps->gpe0_en[GPE_63_32], 32); |
| 69 | pch_log_gpio_gpe(ps->gpe0_sts[GPE_94_64], ps->gpe0_en[GPE_94_64], 64); |
| 70 | } |
| 71 | |
| 72 | static void pch_log_power_and_resets(struct chipset_power_state *ps) |
| 73 | { |
| 74 | /* Thermal Trip Status */ |
| 75 | if (ps->gen_pmcon2 & THERMTRIP_STS) |
| 76 | elog_add_event(ELOG_TYPE_THERM_TRIP); |
| 77 | |
| 78 | /* PWR_FLR Power Failure */ |
| 79 | if (ps->gen_pmcon2 & PWROK_FLR) |
| 80 | elog_add_event(ELOG_TYPE_POWER_FAIL); |
| 81 | |
| 82 | /* SUS Well Power Failure */ |
| 83 | if (ps->gen_pmcon3 & SUS_PWR_FLR) |
| 84 | elog_add_event(ELOG_TYPE_SUS_POWER_FAIL); |
| 85 | |
| 86 | /* SYS_PWROK Failure */ |
| 87 | if (ps->gen_pmcon2 & SYSPWR_FLR) |
| 88 | elog_add_event(ELOG_TYPE_SYS_PWROK_FAIL); |
| 89 | |
| 90 | /* PWROK Failure */ |
| 91 | if (ps->gen_pmcon2 & PWROK_FLR) |
| 92 | elog_add_event(ELOG_TYPE_PWROK_FAIL); |
| 93 | |
Duncan Laurie | 047f03a | 2014-08-11 09:54:19 -0700 | [diff] [blame] | 94 | /* TCO Timeout */ |
Aaron Durbin | 9e6d143 | 2016-07-13 23:21:41 -0500 | [diff] [blame] | 95 | if (ps->prev_sleep_state != ACPI_S3 && |
Duncan Laurie | 047f03a | 2014-08-11 09:54:19 -0700 | [diff] [blame] | 96 | ps->tco2_sts & TCO2_STS_SECOND_TO) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 97 | elog_add_event(ELOG_TYPE_TCO_RESET); |
| 98 | |
| 99 | /* Power Button Override */ |
| 100 | if (ps->pm1_sts & PRBTNOR_STS) |
| 101 | elog_add_event(ELOG_TYPE_POWER_BUTTON_OVERRIDE); |
| 102 | |
| 103 | /* RTC reset */ |
| 104 | if (ps->gen_pmcon3 & RTC_BATTERY_DEAD) |
| 105 | elog_add_event(ELOG_TYPE_RTC_RESET); |
| 106 | |
| 107 | /* System Reset Status (reset button pushed) */ |
| 108 | if (ps->gen_pmcon2 & SYSTEM_RESET_STS) |
| 109 | elog_add_event(ELOG_TYPE_RESET_BUTTON); |
| 110 | |
| 111 | /* General Reset Status */ |
| 112 | if (ps->gen_pmcon3 & GEN_RST_STS) |
| 113 | elog_add_event(ELOG_TYPE_SYSTEM_RESET); |
| 114 | |
| 115 | /* ACPI Wake Event */ |
Aaron Durbin | 9e6d143 | 2016-07-13 23:21:41 -0500 | [diff] [blame] | 116 | if (ps->prev_sleep_state != ACPI_S0) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 117 | elog_add_event_byte(ELOG_TYPE_ACPI_WAKE, ps->prev_sleep_state); |
| 118 | } |
| 119 | |
| 120 | static void pch_log_state(void *unused) |
| 121 | { |
| 122 | struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); |
| 123 | |
| 124 | if (ps == NULL) { |
| 125 | printk(BIOS_ERR, "Not logging power state information. " |
| 126 | "Power state not found in cbmem.\n"); |
| 127 | return; |
| 128 | } |
| 129 | |
| 130 | /* Power and Reset */ |
| 131 | pch_log_power_and_resets(ps); |
| 132 | |
| 133 | /* Wake Sources */ |
| 134 | pch_log_wake_source(ps); |
| 135 | } |
| 136 | |
Aaron Durbin | 9ef9d85 | 2015-03-16 17:30:09 -0500 | [diff] [blame] | 137 | BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, pch_log_state, NULL); |