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review.coreboot.org / coreboot / 7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8 / . / src / mainboard / kontron / 986lcd-m / mptable.c
blob: b0bfbe71c5b1aaad813b72c015cdf046ef0bd4da [file] [log] [blame]
Angel Ponsa21dff62020-04-03 01:22:24 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]2
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]3#include <device/device.h>
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]4#include <arch/smp/mpspec.h>
Uwe Hermann74d1a6e2010-10-12 17:34:08 +0000[diff] [blame]5#include <arch/ioapic.h>
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]6
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]7static void *smp_write_config_table(void *v)
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]8{
Elyes HAOUAS8da96e52016-09-22 21:20:54 +0200[diff] [blame]9 struct mp_config_table *mc;
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]10 struct device *riser = NULL, *firewire = NULL;
Patrick Georgiab272662010-06-25 13:43:22 +0000[diff] [blame]11 int firewire_bus = 0, riser_bus = 0, isa_bus;
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]12
Elyes HAOUAS8da96e52016-09-22 21:20:54 +0200[diff] [blame]13 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]14
Kyösti Mälkkidea42e02021-05-31 20:26:16 +0300[diff] [blame]15 mptable_init(mc);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]16
Elyes HAOUAS8da96e52016-09-22 21:20:54 +0200[diff] [blame]17 smp_write_processors(mc);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]18
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]19 firewire = dev_find_device(0x104c, 0x8023, 0);
20 if (firewire) {
Arthur Heymans7fcd4d52023-08-24 15:12:19 +0200[diff] [blame^]21 firewire_bus = firewire->upstream->secondary;
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]22 }
23
Elyes HAOUASf10b5ff2016-10-06 19:49:55 +0200[diff] [blame]24 /* If a riser card is used, this riser is detected on bus 4, so its secondary bus is the */
25 /* highest bus number on the pci bus. */
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]26 riser = dev_find_device(0x3388, 0x0021, 0);
27 if (!riser)
28 riser = dev_find_device(0x3388, 0x0022, 0);
29 if (riser) {
Arthur Heymans7fcd4d52023-08-24 15:12:19 +0200[diff] [blame^]30 riser_bus = riser->downstream->secondary;
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]31 }
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]32
Patrick Georgiab272662010-06-25 13:43:22 +0000[diff] [blame]33 mptable_write_buses(mc, NULL, &isa_bus);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]34
35 /* I/O APICs: APIC ID Version State Address */
Kyösti Mälkki860cff92021-06-07 22:20:57 +0300[diff] [blame]36 u8 ioapic_id = smp_write_ioapic_from_hw(mc, VIO_APIC_VADDR);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]37
38 /* Legacy Interrupts */
Patrick Georgic5b87c82010-05-20 15:28:19 +0000[diff] [blame]39 mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]40
41 /* Builtin devices on Bus 0 */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]42 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x01, 0, ioapic_id, 0x10);
43 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x02, 0, ioapic_id, 0x10);
44 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1f, 1, ioapic_id, 0x13);
45 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 0, ioapic_id, 0x17);
46 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 1, ioapic_id, 0x13);
47 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 2, ioapic_id, 0x12);
48 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 3, ioapic_id, 0x10);
49 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1b, 0, ioapic_id, 0x10);
50 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1c, 0, ioapic_id, 0x10);
51 smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1c, 1, ioapic_id, 0x11);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]52
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]53 /* Internal PCI bus (Firewire, PCI slot) */
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]54 if (firewire) {
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]55 smp_write_pci_intsrc(mc, mp_INT, firewire_bus, 0x00, 0, ioapic_id, 0x10);
56 smp_write_pci_intsrc(mc, mp_INT, firewire_bus, 0x01, 0, ioapic_id, 0x14);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]57 }
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]58
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]59 if (riser) {
60 /* Old riser card */
Elyes HAOUASf10b5ff2016-10-06 19:49:55 +0200[diff] [blame]61 /* riser slot top 5:8.0 */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]62 smp_write_pci_intsrc(mc, mp_INT, riser_bus, 0x08, 0, ioapic_id, 0x14);
Elyes HAOUASf10b5ff2016-10-06 19:49:55 +0200[diff] [blame]63 /* riser slot middle 5:9.0 */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]64 smp_write_pci_intsrc(mc, mp_INT, riser_bus, 0x09, 0, ioapic_id, 0x15);
Elyes HAOUASf10b5ff2016-10-06 19:49:55 +0200[diff] [blame]65 /* riser slot bottom 5:a.0 */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]66 smp_write_pci_intsrc(mc, mp_INT, riser_bus, 0x0a, 0, ioapic_id, 0x16);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]67
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]68 /* New Riser Card */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]69 smp_write_pci_intsrc(mc, mp_INT, riser_bus, 0x0c, 0, ioapic_id, 0x14);
70 smp_write_pci_intsrc(mc, mp_INT, riser_bus, 0x0d, 0, ioapic_id, 0x15);
71 smp_write_pci_intsrc(mc, mp_INT, riser_bus, 0x0e, 0, ioapic_id, 0x16);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]72 }
Stefan Reinauere1025d02009-03-11 15:20:36 +0000[diff] [blame]73
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]74 /* PCIe slot */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]75 smp_write_pci_intsrc(mc, mp_INT, 0x1, 0x00, 0, ioapic_id, 0x10);
76 smp_write_pci_intsrc(mc, mp_INT, 0x1, 0x00, 1, ioapic_id, 0x11);
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]77
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]78 /* Onboard Ethernet */
Kyösti Mälkki7742aed2021-06-07 22:18:35 +0300[diff] [blame]79 smp_write_pci_intsrc(mc, mp_INT, 0x2, 0x00, 0, ioapic_id, 0x10);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]80
81 /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
Patrick Georgi6eb7a532011-10-07 21:42:52 +0200[diff] [blame]82 mptable_lintsrc(mc, isa_bus);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]83
84 /* Compute the checksums */
Patrick Georgib0a9c5c2011-10-07 23:01:55 +0200[diff] [blame]85 return mptable_finalize(mc);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]86}
87
88unsigned long write_smp_table(unsigned long addr)
89{
90 void *v;
Patrick Georgic75c79b2011-10-07 22:41:07 +0200[diff] [blame]91 v = smp_write_floating_table(addr, 1);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]92 return (unsigned long)smp_write_config_table(v);
93}