Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <device/pci_ids.h> |
| 7 | #include <device/pci_ops.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 8 | #include <device/mmio.h> |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 9 | #include <delay.h> |
Vladimir Serbinenko | 75c8387 | 2014-09-05 01:01:31 +0200 | [diff] [blame] | 10 | #include <device/azalia_device.h> |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 11 | |
| 12 | #include "chip.h" |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 13 | #include "pch.h" |
| 14 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 15 | typedef struct southbridge_intel_bd82x6x_config config_t; |
| 16 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 17 | static int codec_detect(u8 *base) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 18 | { |
| 19 | u8 reg8; |
| 20 | |
| 21 | /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame] | 22 | if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 23 | goto no_codec; |
| 24 | |
| 25 | /* Write back the value once reset bit is set. */ |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 26 | write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG)); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 27 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 28 | /* Read in Codec location (BAR + 0xe)[2..0] */ |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 29 | reg8 = read8(base + HDA_STATESTS_REG); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 30 | reg8 &= 0x0f; |
| 31 | if (!reg8) |
| 32 | goto no_codec; |
| 33 | |
| 34 | return reg8; |
| 35 | |
| 36 | no_codec: |
| 37 | /* Codec Not found */ |
| 38 | /* Put HDA back in reset (BAR + 0x8) [0] */ |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame] | 39 | azalia_set_bits(base + HDA_GCTL_REG, 1, 0); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 40 | printk(BIOS_DEBUG, "Azalia: No codec!\n"); |
| 41 | return 0; |
| 42 | } |
| 43 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 44 | /* |
| 45 | * Wait 50usec for the codec to indicate it is ready. |
| 46 | * No response would imply that the codec is non-operative. |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 47 | */ |
| 48 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 49 | static int wait_for_ready(u8 *base) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 50 | { |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 51 | /* Use a 1msec timeout */ |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 52 | int timeout = 1000; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 53 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 54 | while (timeout--) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 55 | u32 reg32 = read32(base + HDA_ICII_REG); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 56 | if (!(reg32 & HDA_ICII_BUSY)) |
| 57 | return 0; |
| 58 | udelay(1); |
| 59 | } |
| 60 | |
| 61 | return -1; |
| 62 | } |
| 63 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 64 | /* |
| 65 | * Wait 50usec for the codec to indicate that it accepted the previous command. |
| 66 | * No response would imply that the code is non-operative. |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 67 | */ |
| 68 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 69 | static int wait_for_valid(u8 *base) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 70 | { |
| 71 | u32 reg32; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 72 | /* Use a 1msec timeout */ |
| 73 | int timeout = 1000; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 74 | |
| 75 | /* Send the verb to the codec */ |
| 76 | reg32 = read32(base + HDA_ICII_REG); |
| 77 | reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; |
| 78 | write32(base + HDA_ICII_REG, reg32); |
| 79 | |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 80 | while (timeout--) { |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 81 | reg32 = read32(base + HDA_ICII_REG); |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 82 | if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 83 | return 0; |
| 84 | udelay(1); |
| 85 | } |
| 86 | |
| 87 | return -1; |
| 88 | } |
| 89 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 90 | static void codec_init(struct device *dev, u8 *base, int addr) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 91 | { |
| 92 | u32 reg32; |
| 93 | const u32 *verb; |
| 94 | u32 verb_size; |
| 95 | int i; |
| 96 | |
| 97 | printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr); |
| 98 | |
| 99 | /* 1 */ |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 100 | if (wait_for_ready(base) < 0) { |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 101 | printk(BIOS_DEBUG, " codec not ready.\n"); |
| 102 | return; |
| 103 | } |
| 104 | |
| 105 | reg32 = (addr << 28) | 0x000f0000; |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 106 | write32(base + HDA_IC_REG, reg32); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 107 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 108 | if (wait_for_valid(base) < 0) { |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 109 | printk(BIOS_DEBUG, " codec not valid.\n"); |
| 110 | return; |
| 111 | } |
| 112 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 113 | /* 2 */ |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 114 | reg32 = read32(base + HDA_IR_REG); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 115 | printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32); |
Angel Pons | d425ddd | 2020-12-05 18:22:58 +0100 | [diff] [blame] | 116 | verb_size = azalia_find_verb(cim_verb_data, cim_verb_data_size, reg32, &verb); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 117 | |
| 118 | if (!verb_size) { |
| 119 | printk(BIOS_DEBUG, "Azalia: No verb!\n"); |
| 120 | return; |
| 121 | } |
| 122 | printk(BIOS_DEBUG, "Azalia: verb_size: %d\n", verb_size); |
| 123 | |
| 124 | /* 3 */ |
| 125 | for (i = 0; i < verb_size; i++) { |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 126 | if (wait_for_ready(base) < 0) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 127 | return; |
| 128 | |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 129 | write32(base + HDA_IC_REG, verb[i]); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 130 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 131 | if (wait_for_valid(base) < 0) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 132 | return; |
| 133 | } |
| 134 | printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); |
| 135 | } |
| 136 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 137 | static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 138 | { |
| 139 | int i; |
| 140 | for (i = 3; i >= 0; i--) { |
| 141 | if (codec_mask & (1 << i)) |
| 142 | codec_init(dev, base, i); |
| 143 | } |
Dylan Reid | b98d078 | 2012-04-27 11:37:33 -0700 | [diff] [blame] | 144 | |
| 145 | for (i = 0; i < pc_beep_verbs_size; i++) { |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 146 | if (wait_for_ready(base) < 0) |
Dylan Reid | b98d078 | 2012-04-27 11:37:33 -0700 | [diff] [blame] | 147 | return; |
| 148 | |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 149 | write32(base + HDA_IC_REG, pc_beep_verbs[i]); |
Dylan Reid | b98d078 | 2012-04-27 11:37:33 -0700 | [diff] [blame] | 150 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 151 | if (wait_for_valid(base) < 0) |
Dylan Reid | b98d078 | 2012-04-27 11:37:33 -0700 | [diff] [blame] | 152 | return; |
| 153 | } |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 154 | } |
| 155 | |
| 156 | static void azalia_init(struct device *dev) |
| 157 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 158 | u8 *base; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 159 | struct resource *res; |
| 160 | u32 codec_mask; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 161 | u32 reg32; |
| 162 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 163 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 164 | if (!res) |
| 165 | return; |
| 166 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 167 | // NOTE this will break as soon as the Azalia get's a bar above 4G. |
| 168 | // Is there anything we can do about it? |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 169 | base = res2mmio(res, 0, 0); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 170 | printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base); |
| 171 | |
Patrick Rudolph | 4f8b108 | 2019-07-14 11:54:58 +0200 | [diff] [blame] | 172 | if (RCBA32(CIR31) & (1 << 31)) { |
Kyösti Mälkki | fd98c65 | 2013-07-26 08:50:53 +0300 | [diff] [blame] | 173 | reg32 = pci_read_config32(dev, 0x120); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 174 | reg32 &= 0xf8ffff01; |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 175 | reg32 |= (1 << 24); // 2 << 24 for server |
Patrick Rudolph | 4f8b108 | 2019-07-14 11:54:58 +0200 | [diff] [blame] | 176 | reg32 |= RCBA32(CIR31) & 0xfe; |
Kyösti Mälkki | fd98c65 | 2013-07-26 08:50:53 +0300 | [diff] [blame] | 177 | pci_write_config32(dev, 0x120, reg32); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 178 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 179 | pci_or_config16(dev, 0x78, 1 << 11); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 180 | } else |
| 181 | printk(BIOS_DEBUG, "Azalia: V1CTL disabled.\n"); |
| 182 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 183 | pci_and_config32(dev, 0x114, ~0xfe); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 184 | |
| 185 | // Set VCi enable bit |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 186 | pci_or_config32(dev, 0x120, 1 << 31); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 187 | |
| 188 | // Enable HDMI codec: |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 189 | pci_or_config32(dev, 0xc4, 1 << 1); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 190 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 191 | pci_or_config8(dev, 0x43, 1 << 6); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 192 | |
| 193 | /* Additional programming steps */ |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 194 | pci_or_config32(dev, 0xc4, 1 << 13); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 195 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 196 | pci_or_config32(dev, 0xc4, 1 << 10); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 197 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 198 | pci_and_config32(dev, 0xd0, ~(1 << 31)); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 199 | |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 200 | if (dev->device == 0x1e20) { |
| 201 | /* Additional step on Panther Point */ |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 202 | pci_or_config32(dev, 0xc4, 1 << 17); |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 203 | } |
| 204 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 205 | /* Set Bus Master */ |
Elyes HAOUAS | 729c069 | 2020-04-28 19:50:44 +0200 | [diff] [blame] | 206 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 207 | |
| 208 | pci_write_config8(dev, 0x3c, 0x0a); // unused? |
| 209 | |
| 210 | /* Codec Initialization Programming Sequence */ |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 211 | |
| 212 | /* Take controller out of reset */ |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 213 | reg32 = read32(base + HDA_GCTL_REG); |
| 214 | reg32 |= HDA_GCTL_CRST; |
| 215 | write32(base + HDA_GCTL_REG, reg32); |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 216 | /* Wait 1ms */ |
| 217 | udelay(1000); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 218 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 219 | // Select Azalia mode. This needs to be controlled via devicetree.cb |
| 220 | pci_or_config8(dev, 0x40, 1); // Audio Control |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 221 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 222 | // Docking not supported |
| 223 | pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 224 | |
| 225 | codec_mask = codec_detect(base); |
| 226 | |
| 227 | if (codec_mask) { |
| 228 | printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); |
| 229 | codecs_init(dev, base, codec_mask); |
| 230 | } |
| 231 | |
| 232 | /* Enable dynamic clock gating */ |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 233 | pci_update_config8(dev, 0x43, ~0x07, (1 << 2) | (1 << 0)); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 234 | } |
| 235 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 236 | static const char *azalia_acpi_name(const struct device *dev) |
Patrick Rudolph | 604f698 | 2017-06-07 09:46:52 +0200 | [diff] [blame] | 237 | { |
| 238 | return "HDEF"; |
| 239 | } |
| 240 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 241 | static struct device_operations azalia_ops = { |
| 242 | .read_resources = pci_dev_read_resources, |
| 243 | .set_resources = pci_dev_set_resources, |
| 244 | .enable_resources = pci_dev_enable_resources, |
| 245 | .init = azalia_init, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 246 | .ops_pci = &pci_dev_ops_pci, |
Patrick Rudolph | 604f698 | 2017-06-07 09:46:52 +0200 | [diff] [blame] | 247 | .acpi_name = azalia_acpi_name, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 248 | }; |
| 249 | |
Stefan Reinauer | 9a380ab | 2012-06-22 13:16:11 -0700 | [diff] [blame] | 250 | static const unsigned short pci_device_ids[] = { 0x1c20, 0x1e20, 0 }; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 251 | |
Stefan Reinauer | 9a380ab | 2012-06-22 13:16:11 -0700 | [diff] [blame] | 252 | static const struct pci_driver pch_azalia __pci_driver = { |
| 253 | .ops = &azalia_ops, |
| 254 | .vendor = PCI_VENDOR_ID_INTEL, |
| 255 | .devices = pci_device_ids, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 256 | }; |