Patrick Georgi | 11f0079 | 2020-03-04 15:10:45 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 2 | |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 3 | #include <assert.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 5 | #include <arch/ioapic.h> |
| 6 | #include <console/console.h> |
| 7 | #include <cpu/x86/lapic.h> |
| 8 | |
Arthur Heymans | f1e78a1 | 2022-12-06 18:23:30 +0100 | [diff] [blame] | 9 | #define ALL (0xff << 24) |
| 10 | #define NONE (0) |
| 11 | #define INT_DISABLED (1 << 16) |
| 12 | #define INT_ENABLED (0 << 16) |
| 13 | #define TRIGGER_EDGE (0 << 15) |
| 14 | #define TRIGGER_LEVEL (1 << 15) |
| 15 | #define POLARITY_HIGH (0 << 13) |
| 16 | #define POLARITY_LOW (1 << 13) |
| 17 | #define PHYSICAL_DEST (0 << 11) |
| 18 | #define LOGICAL_DEST (1 << 11) |
| 19 | #define ExtINT (7 << 8) |
| 20 | #define NMI (4 << 8) |
| 21 | #define SMI (2 << 8) |
| 22 | #define INT (1 << 8) |
| 23 | |
Kyösti Mälkki | 1d3c2e6 | 2021-06-08 06:23:39 +0300 | [diff] [blame] | 24 | static u32 io_apic_read(void *ioapic_base, u32 reg) |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 25 | { |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 26 | write32(ioapic_base, reg); |
| 27 | return read32(ioapic_base + 0x10); |
| 28 | } |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 29 | |
Kyösti Mälkki | 1d3c2e6 | 2021-06-08 06:23:39 +0300 | [diff] [blame] | 30 | static void io_apic_write(void *ioapic_base, u32 reg, u32 value) |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 31 | { |
| 32 | write32(ioapic_base, reg); |
| 33 | write32(ioapic_base + 0x10, value); |
| 34 | } |
| 35 | |
Kyösti Mälkki | 93c1eef | 2021-06-03 23:14:05 +0300 | [diff] [blame] | 36 | static void write_vector(void *ioapic_base, u8 vector, u32 high, u32 low) |
| 37 | { |
| 38 | io_apic_write(ioapic_base, vector * 2 + 0x10, low); |
| 39 | io_apic_write(ioapic_base, vector * 2 + 0x11, high); |
| 40 | |
| 41 | printk(BIOS_SPEW, "IOAPIC: vector 0x%02x value 0x%08x 0x%08x\n", |
| 42 | vector, high, low); |
| 43 | } |
| 44 | |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 45 | /* Bits 23-16 of register 0x01 specify the maximum redirection entry, which |
| 46 | * is the number of interrupts minus 1. */ |
| 47 | unsigned int ioapic_get_max_vectors(void *ioapic_base) |
Patrick Georgi | d1de45e | 2013-01-23 13:45:23 +0100 | [diff] [blame] | 48 | { |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 49 | u32 reg; |
| 50 | u8 count; |
Patrick Georgi | d1de45e | 2013-01-23 13:45:23 +0100 | [diff] [blame] | 51 | |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 52 | reg = io_apic_read(ioapic_base, 0x01); |
Kyösti Mälkki | 6139ff9 | 2021-10-18 19:43:49 +0300 | [diff] [blame] | 53 | count = (reg >> 16) & 0xff; |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 54 | |
Kyösti Mälkki | 6139ff9 | 2021-10-18 19:43:49 +0300 | [diff] [blame] | 55 | if (count == 0xff) |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 56 | count = 23; |
| 57 | count++; |
| 58 | |
| 59 | printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", count); |
| 60 | return count; |
| 61 | } |
| 62 | |
| 63 | /* Set maximum number of redirection entries (MRE). It is write-once register |
| 64 | * for some chipsets, and a negative mre_count will lock it to the number |
| 65 | * of vectors read from the register. */ |
| 66 | void ioapic_set_max_vectors(void *ioapic_base, int mre_count) |
| 67 | { |
| 68 | u32 reg; |
| 69 | u8 count; |
| 70 | |
| 71 | reg = io_apic_read(ioapic_base, 0x01); |
Kyösti Mälkki | 6139ff9 | 2021-10-18 19:43:49 +0300 | [diff] [blame] | 72 | count = (reg >> 16) & 0xff; |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 73 | if (mre_count > 0) |
| 74 | count = mre_count - 1; |
| 75 | reg &= ~(0xff << 16); |
| 76 | reg |= count << 16; |
Iru Cai | 308a5b9 | 2021-10-23 21:44:02 +0800 | [diff] [blame] | 77 | io_apic_write(ioapic_base, 0x01, reg); |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | void ioapic_lock_max_vectors(void *ioapic_base) |
| 81 | { |
| 82 | ioapic_set_max_vectors(ioapic_base, -1); |
Patrick Georgi | d1de45e | 2013-01-23 13:45:23 +0100 | [diff] [blame] | 83 | } |
| 84 | |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 85 | static void clear_vectors(void *ioapic_base, u8 first, u8 last) |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 86 | { |
| 87 | u32 low, high; |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 88 | u8 i; |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 89 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 90 | printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at %p\n", ioapic_base); |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 91 | |
Marc Jones | f7dc972 | 2018-03-31 22:45:35 -0600 | [diff] [blame] | 92 | low = INT_DISABLED; |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 93 | high = NONE; |
| 94 | |
Kyösti Mälkki | 93c1eef | 2021-06-03 23:14:05 +0300 | [diff] [blame] | 95 | for (i = first; i <= last; i++) |
| 96 | write_vector(ioapic_base, i, high, low); |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 97 | |
| 98 | if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) { |
Uwe Hermann | e4990365 | 2010-10-14 23:40:10 +0000 | [diff] [blame] | 99 | printk(BIOS_WARNING, "IOAPIC not responding.\n"); |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 100 | return; |
| 101 | } |
| 102 | } |
| 103 | |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 104 | static void route_i8259_irq0(void *ioapic_base) |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 105 | { |
| 106 | u32 bsp_lapicid = lapicid(); |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 107 | u32 low, high; |
| 108 | |
| 109 | ASSERT(bsp_lapicid < 255); |
| 110 | |
| 111 | printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n", |
| 112 | bsp_lapicid); |
| 113 | |
| 114 | /* Enable Virtual Wire Mode. Should this be LOGICAL_DEST instead? */ |
| 115 | low = INT_ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT; |
| 116 | high = bsp_lapicid << (56 - 32); |
| 117 | |
Kyösti Mälkki | 93c1eef | 2021-06-03 23:14:05 +0300 | [diff] [blame] | 118 | write_vector(ioapic_base, 0, high, low); |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 119 | |
| 120 | if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) { |
| 121 | printk(BIOS_WARNING, "IOAPIC not responding.\n"); |
| 122 | return; |
| 123 | } |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 124 | } |
| 125 | |
Kyösti Mälkki | 1d3c2e6 | 2021-06-08 06:23:39 +0300 | [diff] [blame] | 126 | static void set_ioapic_id(void *ioapic_base, u8 ioapic_id) |
Kyösti Mälkki | ea2fb8d | 2021-06-03 23:12:09 +0300 | [diff] [blame] | 127 | { |
Paul Menzel | 1b3e176 | 2013-04-23 14:49:41 +0200 | [diff] [blame] | 128 | int i; |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 129 | |
Julius Werner | 540a980 | 2019-12-09 13:03:29 -0800 | [diff] [blame] | 130 | printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at %p\n", |
Uwe Hermann | e4990365 | 2010-10-14 23:40:10 +0000 | [diff] [blame] | 131 | ioapic_base); |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 132 | |
| 133 | if (ioapic_id) { |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 134 | printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id); |
Uwe Hermann | e4990365 | 2010-10-14 23:40:10 +0000 | [diff] [blame] | 135 | /* Set IOAPIC ID if it has been specified. */ |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 136 | io_apic_write(ioapic_base, 0x00, |
Kyösti Mälkki | 939103c | 2011-10-19 07:23:51 +0300 | [diff] [blame] | 137 | (io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) | |
Uwe Hermann | e4990365 | 2010-10-14 23:40:10 +0000 | [diff] [blame] | 138 | (ioapic_id << 24)); |
Stefan Reinauer | 0401bd8 | 2010-01-16 18:31:34 +0000 | [diff] [blame] | 139 | } |
Paul Menzel | 1b3e176 | 2013-04-23 14:49:41 +0200 | [diff] [blame] | 140 | |
| 141 | printk(BIOS_SPEW, "IOAPIC: Dumping registers\n"); |
| 142 | for (i = 0; i < 3; i++) |
| 143 | printk(BIOS_SPEW, " reg 0x%04x: 0x%08x\n", i, |
| 144 | io_apic_read(ioapic_base, i)); |
| 145 | |
Kyösti Mälkki | db4f875 | 2012-01-31 17:24:12 +0200 | [diff] [blame] | 146 | } |
| 147 | |
Kyösti Mälkki | 401ec98 | 2021-06-06 08:27:15 +0300 | [diff] [blame] | 148 | u8 get_ioapic_id(void *ioapic_base) |
| 149 | { |
| 150 | return (io_apic_read(ioapic_base, 0x00) >> 24) & 0x0f; |
| 151 | } |
| 152 | |
| 153 | u8 get_ioapic_version(void *ioapic_base) |
| 154 | { |
| 155 | return io_apic_read(ioapic_base, 0x01) & 0xff; |
| 156 | } |
| 157 | |
Kyösti Mälkki | 8c9a89d | 2021-06-06 08:14:57 +0300 | [diff] [blame] | 158 | void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb) |
Kyösti Mälkki | db4f875 | 2012-01-31 17:24:12 +0200 | [diff] [blame] | 159 | { |
Kyösti Mälkki | 8cc25d2 | 2021-06-03 18:36:05 +0300 | [diff] [blame] | 160 | if (irq_on_fsb) { |
Martin Roth | 898a775 | 2017-06-01 11:39:59 -0600 | [diff] [blame] | 161 | /* |
| 162 | * For the Pentium 4 and above APICs deliver their interrupts |
| 163 | * on the front side bus, enable that. |
| 164 | */ |
| 165 | printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); |
| 166 | io_apic_write(ioapic_base, 0x03, |
| 167 | io_apic_read(ioapic_base, 0x03) | (1 << 0)); |
Kyösti Mälkki | 8cc25d2 | 2021-06-03 18:36:05 +0300 | [diff] [blame] | 168 | } else { |
Martin Roth | 898a775 | 2017-06-01 11:39:59 -0600 | [diff] [blame] | 169 | printk(BIOS_DEBUG, |
| 170 | "IOAPIC: Enabling interrupts on APIC serial bus\n"); |
| 171 | io_apic_write(ioapic_base, 0x03, 0); |
| 172 | } |
Kyösti Mälkki | 8c9a89d | 2021-06-06 08:14:57 +0300 | [diff] [blame] | 173 | } |
| 174 | |
Kyösti Mälkki | 6644d7c | 2021-06-06 08:10:05 +0300 | [diff] [blame] | 175 | void setup_ioapic(void *ioapic_base, u8 ioapic_id) |
Kyösti Mälkki | 8c9a89d | 2021-06-06 08:14:57 +0300 | [diff] [blame] | 176 | { |
Kyösti Mälkki | 8c9a89d | 2021-06-06 08:14:57 +0300 | [diff] [blame] | 177 | set_ioapic_id(ioapic_base, ioapic_id); |
Kyösti Mälkki | 04a4037 | 2021-06-06 08:04:28 +0300 | [diff] [blame] | 178 | clear_vectors(ioapic_base, 0, ioapic_get_max_vectors(ioapic_base) - 1); |
Kyösti Mälkki | 6644d7c | 2021-06-06 08:10:05 +0300 | [diff] [blame] | 179 | route_i8259_irq0(ioapic_base); |
Kyösti Mälkki | db4f875 | 2012-01-31 17:24:12 +0200 | [diff] [blame] | 180 | } |
Kyösti Mälkki | 0ea8f89 | 2021-06-08 11:28:25 +0300 | [diff] [blame] | 181 | |
| 182 | void register_new_ioapic_gsi0(void *ioapic_base) |
| 183 | { |
| 184 | setup_ioapic(ioapic_base, 0); |
| 185 | } |
| 186 | |
| 187 | void register_new_ioapic(void *ioapic_base) |
| 188 | { |
| 189 | static u8 ioapic_id; |
| 190 | ioapic_id++; |
| 191 | set_ioapic_id(ioapic_base, ioapic_id); |
| 192 | clear_vectors(ioapic_base, 0, ioapic_get_max_vectors(ioapic_base) - 1); |
| 193 | } |