Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame^] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2008-2009 coresystems GmbH |
| 5 | ## 2012 secunet security Networks AG |
| 6 | ## |
| 7 | ## This program is free software; you can redistribute it and/or modify |
| 8 | ## it under the terms of the GNU General Public License as published by |
| 9 | ## the Free Software Foundation; version 2 of the License. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
| 16 | |
| 17 | config SOUTHBRIDGE_INTEL_I82801JX |
| 18 | bool |
| 19 | select SOUTHBRIDGE_INTEL_COMMON |
| 20 | select IOAPIC |
| 21 | select HAVE_USBDEBUG |
| 22 | select HAVE_HARD_RESET |
| 23 | select USE_WATCHDOG_ON_BOOT |
| 24 | select HAVE_SMI_HANDLER |
| 25 | select HAVE_USBDEBUG_OPTIONS |
| 26 | select SOUTHBRIDGE_INTEL_COMMON_GPIO |
| 27 | select HAVE_INTEL_FIRMWARE |
| 28 | |
| 29 | if SOUTHBRIDGE_INTEL_I82801JX |
| 30 | |
| 31 | config EHCI_BAR |
| 32 | hex |
| 33 | default 0xfef00000 |
| 34 | |
| 35 | config HPET_MIN_TICKS |
| 36 | hex |
| 37 | default 0x80 |
| 38 | |
| 39 | config BOOTBLOCK_SOUTHBRIDGE_INIT |
| 40 | string |
| 41 | default "southbridge/intel/i82801ix/bootblock.c" |
| 42 | |
| 43 | endif |