sb/intel/i82801jx: Copy i82801ix
Change-Id: I878960e7e0f992426382ca717b8b42787f01ebc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
new file mode 100644
index 0000000..99dd1aa
--- /dev/null
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -0,0 +1,43 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008-2009 coresystems GmbH
+## 2012 secunet security Networks AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config SOUTHBRIDGE_INTEL_I82801JX
+ bool
+ select SOUTHBRIDGE_INTEL_COMMON
+ select IOAPIC
+ select HAVE_USBDEBUG
+ select HAVE_HARD_RESET
+ select USE_WATCHDOG_ON_BOOT
+ select HAVE_SMI_HANDLER
+ select HAVE_USBDEBUG_OPTIONS
+ select SOUTHBRIDGE_INTEL_COMMON_GPIO
+ select HAVE_INTEL_FIRMWARE
+
+if SOUTHBRIDGE_INTEL_I82801JX
+
+config EHCI_BAR
+ hex
+ default 0xfef00000
+
+config HPET_MIN_TICKS
+ hex
+ default 0x80
+
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+ string
+ default "southbridge/intel/i82801ix/bootblock.c"
+
+endif