Patrick Georgi | c49d7a3 | 2020-05-08 22:50:46 +0200 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 2 | |
| 3 | ifeq ($(CONFIG_SOC_CAVIUM_CN81XX),y) |
| 4 | |
| 5 | # bootblock |
| 6 | bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock_custom.S |
| 7 | bootblock-y += bootblock.c |
| 8 | bootblock-y += twsi.c |
| 9 | bootblock-y += clock.c |
| 10 | bootblock-y += gpio.c |
| 11 | bootblock-y += timer.c |
| 12 | bootblock-y += spi.c |
| 13 | bootblock-y += uart.c |
| 14 | bootblock-y += cpu.c |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 15 | |
| 16 | ################################################################################ |
Philipp Deppenwiese | 31a4700c | 2018-08-10 16:07:23 -0700 | [diff] [blame] | 17 | # verstage |
| 18 | |
| 19 | verstage-y += twsi.c |
| 20 | verstage-y += clock.c |
| 21 | verstage-y += gpio.c |
| 22 | verstage-y += timer.c |
| 23 | verstage-y += spi.c |
Nico Huber | 755db95 | 2018-11-11 01:42:17 +0100 | [diff] [blame] | 24 | verstage-y += uart.c |
Philipp Deppenwiese | 31a4700c | 2018-08-10 16:07:23 -0700 | [diff] [blame] | 25 | |
| 26 | ################################################################################ |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 27 | # romstage |
| 28 | |
| 29 | romstage-y += twsi.c |
| 30 | romstage-y += clock.c |
| 31 | romstage-y += gpio.c |
| 32 | romstage-y += timer.c |
| 33 | romstage-y += spi.c |
| 34 | romstage-y += uart.c |
Patrick Rudolph | 52acef1 | 2018-08-08 12:46:18 +0200 | [diff] [blame] | 35 | romstage-y += cbmem.c |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 36 | |
| 37 | romstage-y += sdram.c |
Patrick Rudolph | 06c7d64 | 2018-03-26 15:54:41 +0200 | [diff] [blame] | 38 | romstage-y += mmu.c |
| 39 | |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 40 | ################################################################################ |
| 41 | # ramstage |
| 42 | |
| 43 | ramstage-y += twsi.c |
| 44 | ramstage-y += clock.c |
| 45 | ramstage-y += gpio.c |
| 46 | ramstage-y += timer.c |
| 47 | ramstage-y += spi.c |
| 48 | ramstage-y += uart.c |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 49 | ramstage-y += sdram.c |
| 50 | ramstage-y += soc.c |
| 51 | ramstage-y += cpu.c |
Patrick Rudolph | 88f81af | 2018-04-11 11:40:55 +0200 | [diff] [blame] | 52 | ramstage-y += cpu_secondary.S |
Patrick Rudolph | d0c6797 | 2018-04-17 13:47:55 +0200 | [diff] [blame] | 53 | ramstage-y += ecam0.c |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 54 | |
Patrick Rudolph | 5cdaa33 | 2018-04-20 14:43:21 +0200 | [diff] [blame] | 55 | ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c |
| 56 | |
Patrick Rudolph | 5cdaa33 | 2018-04-20 14:43:21 +0200 | [diff] [blame] | 57 | BL31_MAKEARGS += PLAT=t81 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" ENABLE_SPE_FOR_LOWER_ELS=0 |
David Hendricks | 8cbd569 | 2017-12-01 20:49:48 -0800 | [diff] [blame] | 58 | |
| 59 | CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include |
| 60 | |
| 61 | endif |