Felix Held | dc2d356 | 2020-12-02 14:38:53 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Felix Held | 51c4d68 | 2021-02-16 23:14:42 +0100 | [diff] [blame] | 3 | #include <console/console.h> |
Felix Held | dc2d356 | 2020-12-02 14:38:53 +0100 | [diff] [blame] | 4 | #include <device/device.h> |
Felix Held | 51c4d68 | 2021-02-16 23:14:42 +0100 | [diff] [blame] | 5 | #include <device/pci.h> |
Felix Held | 86c24a2 | 2021-01-28 23:07:48 +0100 | [diff] [blame] | 6 | #include <fsp/api.h> |
Jason Glenesk | 79542fa | 2021-03-10 03:50:57 -0800 | [diff] [blame^] | 7 | #include <soc/cpu.h> |
Felix Held | ea32c52 | 2021-02-13 01:42:44 +0100 | [diff] [blame] | 8 | #include <soc/data_fabric.h> |
Felix Held | 51c4d68 | 2021-02-16 23:14:42 +0100 | [diff] [blame] | 9 | #include <soc/pci_devs.h> |
Felix Held | 230dbd6 | 2021-01-28 23:40:52 +0100 | [diff] [blame] | 10 | #include <soc/southbridge.h> |
Felix Held | 86c24a2 | 2021-01-28 23:07:48 +0100 | [diff] [blame] | 11 | #include <types.h> |
Felix Held | c827278 | 2020-12-05 01:39:28 +0100 | [diff] [blame] | 12 | #include "chip.h" |
Felix Held | dc2d356 | 2020-12-02 14:38:53 +0100 | [diff] [blame] | 13 | |
Raul E Rangel | 32fc4e3 | 2021-03-30 15:56:46 -0600 | [diff] [blame] | 14 | /* Supplied by i2c.c */ |
| 15 | extern struct device_operations soc_amd_i2c_mmio_ops; |
Felix Held | c3ce09c | 2021-02-10 16:25:53 +0100 | [diff] [blame] | 16 | /* Supplied by uart.c */ |
| 17 | extern struct device_operations cezanne_uart_mmio_ops; |
| 18 | |
Felix Held | fd05601 | 2021-02-09 16:55:47 +0100 | [diff] [blame] | 19 | struct device_operations cpu_bus_ops = { |
Felix Held | b2d8a5c | 2021-02-10 16:17:13 +0100 | [diff] [blame] | 20 | .read_resources = noop_read_resources, |
| 21 | .set_resources = noop_set_resources, |
| 22 | .init = mp_cpu_bus_init, |
Jason Glenesk | 79542fa | 2021-03-10 03:50:57 -0800 | [diff] [blame^] | 23 | .acpi_fill_ssdt = generate_cpu_entries, |
Felix Held | fd05601 | 2021-02-09 16:55:47 +0100 | [diff] [blame] | 24 | }; |
| 25 | |
Felix Held | 51c4d68 | 2021-02-16 23:14:42 +0100 | [diff] [blame] | 26 | static const char *soc_acpi_name(const struct device *dev) |
| 27 | { |
| 28 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 29 | return "PCI0"; |
| 30 | |
| 31 | if (dev->path.type != DEVICE_PATH_PCI) |
| 32 | return NULL; |
| 33 | |
| 34 | printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n", |
| 35 | PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); |
| 36 | return NULL; |
| 37 | }; |
| 38 | |
Felix Held | 5a7e4a5 | 2021-02-05 21:46:53 +0100 | [diff] [blame] | 39 | static struct device_operations pci_domain_ops = { |
| 40 | .read_resources = pci_domain_read_resources, |
| 41 | .set_resources = pci_domain_set_resources, |
| 42 | .scan_bus = pci_domain_scan_bus, |
Felix Held | 51c4d68 | 2021-02-16 23:14:42 +0100 | [diff] [blame] | 43 | .acpi_name = soc_acpi_name, |
Felix Held | 5a7e4a5 | 2021-02-05 21:46:53 +0100 | [diff] [blame] | 44 | }; |
| 45 | |
Felix Held | c8a0faa | 2021-02-09 16:56:04 +0100 | [diff] [blame] | 46 | static void set_mmio_dev_ops(struct device *dev) |
| 47 | { |
Felix Held | c3ce09c | 2021-02-10 16:25:53 +0100 | [diff] [blame] | 48 | switch (dev->path.mmio.addr) { |
Raul E Rangel | 32fc4e3 | 2021-03-30 15:56:46 -0600 | [diff] [blame] | 49 | case APU_I2C0_BASE: |
| 50 | case APU_I2C1_BASE: |
| 51 | case APU_I2C2_BASE: |
| 52 | case APU_I2C3_BASE: |
| 53 | dev->ops = &soc_amd_i2c_mmio_ops; |
| 54 | break; |
Felix Held | c3ce09c | 2021-02-10 16:25:53 +0100 | [diff] [blame] | 55 | case APU_UART0_BASE: |
| 56 | case APU_UART1_BASE: |
| 57 | dev->ops = &cezanne_uart_mmio_ops; |
| 58 | break; |
| 59 | } |
Felix Held | c8a0faa | 2021-02-09 16:56:04 +0100 | [diff] [blame] | 60 | } |
| 61 | |
Felix Held | 613f9fc | 2021-01-26 18:09:46 +0100 | [diff] [blame] | 62 | static void enable_dev(struct device *dev) |
| 63 | { |
Felix Held | 5a7e4a5 | 2021-02-05 21:46:53 +0100 | [diff] [blame] | 64 | /* Set the operations if it is a special bus type */ |
| 65 | switch (dev->path.type) { |
| 66 | case DEVICE_PATH_DOMAIN: |
| 67 | dev->ops = &pci_domain_ops; |
| 68 | break; |
Felix Held | fd05601 | 2021-02-09 16:55:47 +0100 | [diff] [blame] | 69 | case DEVICE_PATH_CPU_CLUSTER: |
| 70 | dev->ops = &cpu_bus_ops; |
| 71 | break; |
Felix Held | c8a0faa | 2021-02-09 16:56:04 +0100 | [diff] [blame] | 72 | case DEVICE_PATH_MMIO: |
| 73 | set_mmio_dev_ops(dev); |
| 74 | break; |
Felix Held | 5a7e4a5 | 2021-02-05 21:46:53 +0100 | [diff] [blame] | 75 | default: |
| 76 | break; |
| 77 | } |
Felix Held | 613f9fc | 2021-01-26 18:09:46 +0100 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | static void soc_init(void *chip_info) |
| 81 | { |
Kyösti Mälkki | cc93c6e | 2021-01-09 22:53:52 +0200 | [diff] [blame] | 82 | fsp_silicon_init(); |
Felix Held | 230dbd6 | 2021-01-28 23:40:52 +0100 | [diff] [blame] | 83 | |
Felix Held | ea32c52 | 2021-02-13 01:42:44 +0100 | [diff] [blame] | 84 | data_fabric_set_mmio_np(); |
| 85 | |
Felix Held | 230dbd6 | 2021-01-28 23:40:52 +0100 | [diff] [blame] | 86 | fch_init(chip_info); |
Felix Held | 613f9fc | 2021-01-26 18:09:46 +0100 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | static void soc_final(void *chip_info) |
| 90 | { |
Felix Held | 230dbd6 | 2021-01-28 23:40:52 +0100 | [diff] [blame] | 91 | fch_final(chip_info); |
Felix Held | 613f9fc | 2021-01-26 18:09:46 +0100 | [diff] [blame] | 92 | } |
| 93 | |
| 94 | struct chip_operations soc_amd_cezanne_ops = { |
| 95 | CHIP_NAME("AMD Cezanne SoC") |
| 96 | .enable_dev = enable_dev, |
| 97 | .init = soc_init, |
| 98 | .final = soc_final |
| 99 | }; |