soc/amd/cezanne/chip: add FSP silicon init driver call
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id3dea23de0c7ce2fca4382e9fd4ec88aecaa55fb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50092
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index 2869c93..70df778 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
+#include <fsp/api.h>
+#include <types.h>
#include "chip.h"
static void enable_dev(struct device *dev)
@@ -9,6 +11,7 @@
static void soc_init(void *chip_info)
{
+ fsp_silicon_init(false); /* no S3 support yet */
}
static void soc_final(void *chip_info)