Angel Pons | d28443e | 2020-04-05 13:22:44 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 2 | |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 3 | #include <string.h> |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 4 | #include <northbridge/intel/haswell/raminit.h> |
| 5 | #include <southbridge/intel/lynxpoint/pch.h> |
| 6 | #include <southbridge/intel/lynxpoint/lp_gpio.h> |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 7 | #include "../../variant.h" |
| 8 | |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 9 | /* Copy SPD data for on-board memory */ |
Angel Pons | 6eea191 | 2020-07-03 14:14:30 +0200 | [diff] [blame] | 10 | void copy_spd(struct pei_data *peid) |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 11 | { |
| 12 | const int gpio_vector[] = {13, 9, 47, -1}; |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 13 | |
Angel Pons | 77ef99b | 2021-02-11 14:25:44 +0100 | [diff] [blame^] | 14 | unsigned int spd_index = fill_spd_for_index(peid->spd_data[0], get_gpios(gpio_vector)); |
Matt DeVillier | cadd7c7 | 2017-05-29 19:10:57 -0500 | [diff] [blame] | 15 | |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 16 | /* Index 0-2,6 are 4GB config with both CH0 and CH1 |
| 17 | * Index 3-5,7 are 2GB config with CH0 only |
| 18 | */ |
| 19 | switch (spd_index) { |
Matt DeVillier | cadd7c7 | 2017-05-29 19:10:57 -0500 | [diff] [blame] | 20 | case 0: case 1: case 2: case 6: |
Angel Pons | 77ef99b | 2021-02-11 14:25:44 +0100 | [diff] [blame^] | 21 | memcpy(peid->spd_data[1], peid->spd_data[0], SPD_LEN); |
Matt DeVillier | cadd7c7 | 2017-05-29 19:10:57 -0500 | [diff] [blame] | 22 | break; |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 23 | case 3: case 4: case 5: case 7: |
| 24 | peid->dimm_channel1_disabled = 3; |
| 25 | } |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 26 | } |
| 27 | |
Angel Pons | a3c6ed0 | 2021-02-11 13:59:12 +0100 | [diff] [blame] | 28 | const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = { |
| 29 | /* Length, Enable, OCn#, Location */ |
| 30 | { 0x0064, 1, 0, /* P0: Port A, CN8 */ |
| 31 | USB_PORT_BACK_PANEL }, |
| 32 | { 0x0052, 1, 0, /* P1: Port B, CN9 */ |
| 33 | USB_PORT_BACK_PANEL }, |
| 34 | { 0x0040, 1, USB_OC_PIN_SKIP, /* P2: CCD */ |
| 35 | USB_PORT_INTERNAL }, |
| 36 | { 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */ |
| 37 | USB_PORT_INTERNAL }, |
| 38 | { 0x0040, 1, USB_OC_PIN_SKIP, /* P4: LTE */ |
| 39 | USB_PORT_INTERNAL }, |
| 40 | { 0x0040, 1, USB_OC_PIN_SKIP, /* P5: TOUCH */ |
| 41 | USB_PORT_INTERNAL }, |
| 42 | { 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SD Card */ |
| 43 | USB_PORT_INTERNAL }, |
| 44 | { 0x0123, 1, 3, /* P7: USB2 Port */ |
| 45 | USB_PORT_INTERNAL }, |
| 46 | }; |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 47 | |
Angel Pons | a3c6ed0 | 2021-02-11 13:59:12 +0100 | [diff] [blame] | 48 | const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = { |
| 49 | /* Enable, OCn# */ |
| 50 | { 1, 0 }, /* P1; Port A, CN8 */ |
| 51 | { 1, 0 }, /* P2; Port B, CN9 */ |
| 52 | { 0, USB_OC_PIN_SKIP }, /* P3; */ |
| 53 | { 0, USB_OC_PIN_SKIP }, /* P4; */ |
| 54 | }; |