Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <stdint.h> |
| 17 | #include <console/console.h> |
| 18 | #include <device/device.h> |
| 19 | #include <device/pci.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 20 | #include <device/pci_ops.h> |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 21 | #include <device/pci_ids.h> |
| 22 | #include <pc80/isa-dma.h> |
| 23 | #include <pc80/mc146818rtc.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 24 | #include <arch/ioapic.h> |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 25 | #if CONFIG(HAVE_ACPI_TABLES) |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame^] | 26 | #include <acpi/acpi.h> |
| 27 | #include <acpi/acpigen.h> |
Vladimir Serbinenko | 41877d8 | 2014-09-01 22:18:01 +0200 | [diff] [blame] | 28 | #endif |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 29 | #include "i82371eb.h" |
Keith Hui | ce62238 | 2020-01-11 03:49:17 -0500 | [diff] [blame] | 30 | #include "chip.h" |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 31 | |
| 32 | static void isa_init(struct device *dev) |
| 33 | { |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 34 | u32 reg32; |
Keith Hui | ce62238 | 2020-01-11 03:49:17 -0500 | [diff] [blame] | 35 | struct southbridge_intel_i82371eb_config *sb = dev->chip_info; |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 36 | |
| 37 | /* Initialize the real time clock (RTC). */ |
Gabe Black | b3f08c6 | 2014-04-30 17:12:25 -0700 | [diff] [blame] | 38 | cmos_init(0); |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 39 | |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 40 | /* |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 41 | * Enable special cycles, needed for soft poweroff. |
| 42 | */ |
| 43 | reg32 = pci_read_config16(dev, PCI_COMMAND); |
| 44 | reg32 |= PCI_COMMAND_SPECIAL; |
| 45 | pci_write_config16(dev, PCI_COMMAND, reg32); |
| 46 | |
| 47 | /* |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 48 | * The PIIX4 can support the full ISA bus, or the Extended I/O (EIO) |
| 49 | * bus, which is a subset of ISA. We select the full ISA bus here. |
| 50 | */ |
| 51 | reg32 = pci_read_config32(dev, GENCFG); |
| 52 | reg32 |= ISA; /* Select ISA, not EIO. */ |
Keith Hui | ce62238 | 2020-01-11 03:49:17 -0500 | [diff] [blame] | 53 | |
| 54 | /* Some boards use GPO22/23. Select it if configured. */ |
| 55 | reg32 = ONOFF(sb->gpo22_enable, reg32, GPO2223); |
| 56 | pci_write_config32(dev, GENCFG, reg32); |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 57 | |
| 58 | /* Initialize ISA DMA. */ |
| 59 | isa_dma_init(); |
Uwe Hermann | 7718054 | 2010-10-28 08:19:22 +0000 | [diff] [blame] | 60 | |
Uwe Hermann | 7718054 | 2010-10-28 08:19:22 +0000 | [diff] [blame] | 61 | /* |
| 62 | * Unlike most other southbridges the 82371EB doesn't have a built-in |
| 63 | * IOAPIC. Instead, 82371EB-based boards that support multiple CPUs |
| 64 | * have a discrete IOAPIC (Intel 82093AA) soldered onto the board. |
| 65 | * |
| 66 | * Thus, we can/must only enable the IOAPIC if it actually exists, |
| 67 | * i.e. the respective mainboard does "select IOAPIC". |
| 68 | */ |
Keith Hui | 2f3c37b | 2020-01-27 18:00:40 -0500 | [diff] [blame] | 69 | if (CONFIG(IOAPIC)) { |
| 70 | u16 reg16; |
| 71 | u8 ioapic_id = 2; |
| 72 | volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR); |
| 73 | volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10); |
| 74 | |
| 75 | /* Enable IOAPIC. */ |
| 76 | reg16 = pci_read_config16(dev, XBCS); |
| 77 | reg16 |= (1 << 8); /* APIC Chip Select */ |
| 78 | pci_write_config16(dev, XBCS, reg16); |
| 79 | |
| 80 | /* Set the IOAPIC ID. */ |
| 81 | *ioapic_index = 0; |
| 82 | *ioapic_data = ioapic_id << 24; |
| 83 | |
| 84 | /* Read back and verify the IOAPIC ID. */ |
| 85 | *ioapic_index = 0; |
| 86 | reg32 = (*ioapic_data >> 24) & 0x0f; |
| 87 | printk(BIOS_DEBUG, "IOAPIC ID = %x\n", reg32); |
| 88 | if (reg32 != ioapic_id) |
| 89 | die("IOAPIC error!\n"); |
| 90 | } |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 91 | } |
| 92 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 93 | static void sb_read_resources(struct device *dev) |
| 94 | { |
| 95 | struct resource *res; |
| 96 | |
| 97 | pci_dev_read_resources(dev); |
| 98 | |
| 99 | res = new_resource(dev, 1); |
| 100 | res->base = 0x0UL; |
| 101 | res->size = 0x1000UL; |
| 102 | res->limit = 0xffffUL; |
| 103 | res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 104 | |
| 105 | res = new_resource(dev, 2); |
| 106 | res->base = 0xff800000UL; |
| 107 | res->size = 0x00800000UL; /* 8 MB for flash */ |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 108 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED | |
| 109 | IORESOURCE_RESERVE; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 110 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 111 | #if CONFIG(IOAPIC) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 112 | res = new_resource(dev, 3); /* IOAPIC */ |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 113 | res->base = IO_APIC_ADDR; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 114 | res->size = 0x00001000; |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 115 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED | |
| 116 | IORESOURCE_RESERVE; |
| 117 | #endif |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 118 | } |
| 119 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 120 | #if CONFIG(HAVE_ACPI_TABLES) |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 121 | static void southbridge_acpi_fill_ssdt_generator(const struct device *device) |
Vladimir Serbinenko | 41877d8 | 2014-09-01 22:18:01 +0200 | [diff] [blame] | 122 | { |
| 123 | acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS"); |
Alexander Couzens | 5eea458 | 2015-04-12 22:18:55 +0200 | [diff] [blame] | 124 | generate_cpu_entries(device); |
Vladimir Serbinenko | 41877d8 | 2014-09-01 22:18:01 +0200 | [diff] [blame] | 125 | } |
| 126 | #endif |
| 127 | |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 128 | static const struct device_operations isa_ops = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 129 | .read_resources = sb_read_resources, |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 130 | .set_resources = pci_dev_set_resources, |
| 131 | .enable_resources = pci_dev_enable_resources, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 132 | #if CONFIG(HAVE_ACPI_TABLES) |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 133 | .write_acpi_tables = acpi_write_hpet, |
| 134 | .acpi_fill_ssdt = southbridge_acpi_fill_ssdt_generator, |
Vladimir Serbinenko | 41877d8 | 2014-09-01 22:18:01 +0200 | [diff] [blame] | 135 | #endif |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 136 | .init = isa_init, |
Nico Huber | 51b75ae | 2019-03-14 16:02:05 +0100 | [diff] [blame] | 137 | .scan_bus = scan_static_bus, |
Uwe Hermann | 9da69f8 | 2007-11-30 02:08:26 +0000 | [diff] [blame] | 138 | .ops_pci = 0, /* No subsystem IDs on 82371EB! */ |
| 139 | }; |
| 140 | |
| 141 | static const struct pci_driver isa_driver __pci_driver = { |
| 142 | .ops = &isa_ops, |
| 143 | .vendor = PCI_VENDOR_ID_INTEL, |
| 144 | .device = PCI_DEVICE_ID_INTEL_82371AB_ISA, |
| 145 | }; |
Patrick Georgi | 17dda3a | 2020-03-03 17:05:25 +0000 | [diff] [blame] | 146 | |
| 147 | static const struct pci_driver isa_SB_driver __pci_driver = { |
| 148 | .ops = &isa_ops, |
| 149 | .vendor = PCI_VENDOR_ID_INTEL, |
| 150 | .device = PCI_DEVICE_ID_INTEL_82371SB_ISA, |
| 151 | }; |