blob: 7411948fe8f817c47548cd811018464c2a2527f9 [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth5c354b92019-04-22 14:55:16 -06002
Felix Heldd9e82632024-01-26 14:22:31 +01003#include <amdblocks/acpi.h>
Fred Reitberger31e62982022-10-31 14:18:20 -04004#include <amdblocks/data_fabric.h>
Felix Held4e818c52024-01-18 21:43:30 +01005#include <amdblocks/fsp.h>
Felix Held416cc662024-01-31 12:17:58 +01006#include <amdblocks/root_complex.h>
Furquan Shaikh5df9a042020-04-15 22:52:35 -07007#include <console/console.h>
Martin Roth5c354b92019-04-22 14:55:16 -06008#include <device/device.h>
9#include <device/pci.h>
10#include <drivers/i2c/designware/dw_i2c.h>
Martin Roth5c354b92019-04-22 14:55:16 -060011#include <soc/cpu.h>
Furquan Shaikh46637492020-06-03 16:22:20 -070012#include <soc/iomap.h>
Martin Roth5c354b92019-04-22 14:55:16 -060013#include <soc/pci_devs.h>
14#include <soc/southbridge.h>
Martin Roth5c354b92019-04-22 14:55:16 -060015#include "chip.h"
16
Felix Held61e60d12021-02-16 23:23:00 +010017static const char *soc_acpi_name(const struct device *dev)
Martin Roth5c354b92019-04-22 14:55:16 -060018{
19 if (dev->path.type == DEVICE_PATH_DOMAIN)
20 return "PCI0";
21
Martin Roth5c354b92019-04-22 14:55:16 -060022 if (dev->path.type != DEVICE_PATH_PCI)
23 return NULL;
24
Furquan Shaikh5df9a042020-04-15 22:52:35 -070025 printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n",
26 PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
27 return NULL;
Martin Roth5c354b92019-04-22 14:55:16 -060028};
29
Arthur Heymans7f380772022-09-20 14:03:28 +020030struct device_operations picasso_pci_domain_ops = {
Felix Held784c9c62023-01-31 02:24:27 +010031 .read_resources = amd_pci_domain_read_resources,
32 .set_resources = pci_domain_set_resources,
33 .scan_bus = amd_pci_domain_scan_bus,
Felix Held416cc662024-01-31 12:17:58 +010034 .init = amd_pci_domain_init,
Felix Held784c9c62023-01-31 02:24:27 +010035 .acpi_name = soc_acpi_name,
36 .acpi_fill_ssdt = amd_pci_domain_fill_ssdt,
Martin Roth5c354b92019-04-22 14:55:16 -060037};
38
Martin Roth5c354b92019-04-22 14:55:16 -060039static void soc_init(void *chip_info)
40{
Felix Held1b410d92024-01-26 14:05:58 +010041 default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
Matt Papageorgea21eae02019-11-13 17:00:12 -060042
Felix Held4e818c52024-01-18 21:43:30 +010043 amd_fsp_silicon_init();
Marshall Dawson00a22082020-01-20 23:05:31 -070044
Felix Held737c8c22024-02-06 18:42:22 +010045 data_fabric_print_mmio_conf();
46
Felix Heldfaaafb42021-01-28 23:19:40 +010047 fch_init(chip_info);
Martin Roth5c354b92019-04-22 14:55:16 -060048}
49
50static void soc_final(void *chip_info)
51{
Felix Heldfaaafb42021-01-28 23:19:40 +010052 fch_final(chip_info);
Martin Roth5c354b92019-04-22 14:55:16 -060053}
54
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060055struct chip_operations soc_amd_picasso_ops = {
Nicholas Sudsgaardbfb11be2024-01-30 09:53:46 +090056 .name = "AMD Picasso SOC",
Martin Roth5c354b92019-04-22 14:55:16 -060057 .init = soc_init,
58 .final = soc_final
59};