Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 2 | |
Felix Held | d9e8263 | 2024-01-26 14:22:31 +0100 | [diff] [blame^] | 3 | #include <amdblocks/acpi.h> |
Fred Reitberger | 31e6298 | 2022-10-31 14:18:20 -0400 | [diff] [blame] | 4 | #include <amdblocks/data_fabric.h> |
Felix Held | 4e818c5 | 2024-01-18 21:43:30 +0100 | [diff] [blame] | 5 | #include <amdblocks/fsp.h> |
Furquan Shaikh | 5df9a04 | 2020-04-15 22:52:35 -0700 | [diff] [blame] | 6 | #include <console/console.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 7 | #include <device/device.h> |
| 8 | #include <device/pci.h> |
| 9 | #include <drivers/i2c/designware/dw_i2c.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 10 | #include <soc/cpu.h> |
Furquan Shaikh | 4663749 | 2020-06-03 16:22:20 -0700 | [diff] [blame] | 11 | #include <soc/iomap.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 12 | #include <soc/pci_devs.h> |
| 13 | #include <soc/southbridge.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 14 | #include "chip.h" |
| 15 | |
Felix Held | 61e60d1 | 2021-02-16 23:23:00 +0100 | [diff] [blame] | 16 | static const char *soc_acpi_name(const struct device *dev) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 17 | { |
| 18 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 19 | return "PCI0"; |
| 20 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 21 | if (dev->path.type != DEVICE_PATH_PCI) |
| 22 | return NULL; |
| 23 | |
Furquan Shaikh | 5df9a04 | 2020-04-15 22:52:35 -0700 | [diff] [blame] | 24 | printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n", |
| 25 | PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); |
| 26 | return NULL; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 27 | }; |
| 28 | |
Arthur Heymans | 7f38077 | 2022-09-20 14:03:28 +0200 | [diff] [blame] | 29 | struct device_operations picasso_pci_domain_ops = { |
Felix Held | 784c9c6 | 2023-01-31 02:24:27 +0100 | [diff] [blame] | 30 | .read_resources = amd_pci_domain_read_resources, |
| 31 | .set_resources = pci_domain_set_resources, |
| 32 | .scan_bus = amd_pci_domain_scan_bus, |
| 33 | .acpi_name = soc_acpi_name, |
| 34 | .acpi_fill_ssdt = amd_pci_domain_fill_ssdt, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 35 | }; |
| 36 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 37 | static void soc_init(void *chip_info) |
| 38 | { |
Felix Held | 1b410d9 | 2024-01-26 14:05:58 +0100 | [diff] [blame] | 39 | default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables; |
Matt Papageorge | a21eae0 | 2019-11-13 17:00:12 -0600 | [diff] [blame] | 40 | |
Felix Held | 4e818c5 | 2024-01-18 21:43:30 +0100 | [diff] [blame] | 41 | amd_fsp_silicon_init(); |
Marshall Dawson | 00a2208 | 2020-01-20 23:05:31 -0700 | [diff] [blame] | 42 | |
Raul E Rangel | 789aefc | 2020-05-11 16:26:35 -0600 | [diff] [blame] | 43 | data_fabric_set_mmio_np(); |
Felix Held | faaafb4 | 2021-01-28 23:19:40 +0100 | [diff] [blame] | 44 | fch_init(chip_info); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 45 | } |
| 46 | |
| 47 | static void soc_final(void *chip_info) |
| 48 | { |
Felix Held | faaafb4 | 2021-01-28 23:19:40 +0100 | [diff] [blame] | 49 | fch_final(chip_info); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 50 | } |
| 51 | |
Marshall Dawson | bc4c903 | 2019-06-11 12:18:20 -0600 | [diff] [blame] | 52 | struct chip_operations soc_amd_picasso_ops = { |
| 53 | CHIP_NAME("AMD Picasso SOC") |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 54 | .init = soc_init, |
| 55 | .final = soc_final |
| 56 | }; |