blob: 4f3058252c3448ea4e484b8cf8a2d0a41d408c76 [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth5c354b92019-04-22 14:55:16 -06002
Felix Heldd9e82632024-01-26 14:22:31 +01003#include <amdblocks/acpi.h>
Fred Reitberger31e62982022-10-31 14:18:20 -04004#include <amdblocks/data_fabric.h>
Felix Held4e818c52024-01-18 21:43:30 +01005#include <amdblocks/fsp.h>
Furquan Shaikh5df9a042020-04-15 22:52:35 -07006#include <console/console.h>
Martin Roth5c354b92019-04-22 14:55:16 -06007#include <device/device.h>
8#include <device/pci.h>
9#include <drivers/i2c/designware/dw_i2c.h>
Martin Roth5c354b92019-04-22 14:55:16 -060010#include <soc/cpu.h>
Furquan Shaikh46637492020-06-03 16:22:20 -070011#include <soc/iomap.h>
Martin Roth5c354b92019-04-22 14:55:16 -060012#include <soc/pci_devs.h>
13#include <soc/southbridge.h>
Martin Roth5c354b92019-04-22 14:55:16 -060014#include "chip.h"
15
Felix Held61e60d12021-02-16 23:23:00 +010016static const char *soc_acpi_name(const struct device *dev)
Martin Roth5c354b92019-04-22 14:55:16 -060017{
18 if (dev->path.type == DEVICE_PATH_DOMAIN)
19 return "PCI0";
20
Martin Roth5c354b92019-04-22 14:55:16 -060021 if (dev->path.type != DEVICE_PATH_PCI)
22 return NULL;
23
Furquan Shaikh5df9a042020-04-15 22:52:35 -070024 printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n",
25 PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
26 return NULL;
Martin Roth5c354b92019-04-22 14:55:16 -060027};
28
Arthur Heymans7f380772022-09-20 14:03:28 +020029struct device_operations picasso_pci_domain_ops = {
Felix Held784c9c62023-01-31 02:24:27 +010030 .read_resources = amd_pci_domain_read_resources,
31 .set_resources = pci_domain_set_resources,
32 .scan_bus = amd_pci_domain_scan_bus,
33 .acpi_name = soc_acpi_name,
34 .acpi_fill_ssdt = amd_pci_domain_fill_ssdt,
Martin Roth5c354b92019-04-22 14:55:16 -060035};
36
Martin Roth5c354b92019-04-22 14:55:16 -060037static void soc_init(void *chip_info)
38{
Felix Held1b410d92024-01-26 14:05:58 +010039 default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
Matt Papageorgea21eae02019-11-13 17:00:12 -060040
Felix Held4e818c52024-01-18 21:43:30 +010041 amd_fsp_silicon_init();
Marshall Dawson00a22082020-01-20 23:05:31 -070042
Raul E Rangel789aefc2020-05-11 16:26:35 -060043 data_fabric_set_mmio_np();
Felix Heldfaaafb42021-01-28 23:19:40 +010044 fch_init(chip_info);
Martin Roth5c354b92019-04-22 14:55:16 -060045}
46
47static void soc_final(void *chip_info)
48{
Felix Heldfaaafb42021-01-28 23:19:40 +010049 fch_final(chip_info);
Martin Roth5c354b92019-04-22 14:55:16 -060050}
51
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060052struct chip_operations soc_amd_picasso_ops = {
53 CHIP_NAME("AMD Picasso SOC")
Martin Roth5c354b92019-04-22 14:55:16 -060054 .init = soc_init,
55 .final = soc_final
56};