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Martin Rothf95a11e2022-10-21 16:43:08 -06001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/* TODO: Update for Glinda */
4
Felix Heldd9e82632024-01-26 14:22:31 +01005#include <amdblocks/acpi.h>
Fred Reitberger31e62982022-10-31 14:18:20 -04006#include <amdblocks/data_fabric.h>
Felix Held4e818c52024-01-18 21:43:30 +01007#include <amdblocks/fsp.h>
Felix Held416cc662024-01-31 12:17:58 +01008#include <amdblocks/root_complex.h>
Martin Rothf95a11e2022-10-21 16:43:08 -06009#include <console/console.h>
10#include <device/device.h>
11#include <device/pci.h>
Martin Rothf95a11e2022-10-21 16:43:08 -060012#include <soc/cpu.h>
Martin Rothf95a11e2022-10-21 16:43:08 -060013#include <soc/pci_devs.h>
14#include <soc/southbridge.h>
15#include <types.h>
16#include "chip.h"
17
Martin Rothf95a11e2022-10-21 16:43:08 -060018static const char *soc_acpi_name(const struct device *dev)
19{
20 if (dev->path.type == DEVICE_PATH_DOMAIN)
21 return "PCI0";
22
23 if (dev->path.type != DEVICE_PATH_PCI)
24 return NULL;
25
26 printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n",
27 PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
28 return NULL;
29};
30
31struct device_operations glinda_pci_domain_ops = {
Felix Heldb56ea252023-05-31 16:25:30 +020032 .read_resources = amd_pci_domain_read_resources,
Martin Rothf95a11e2022-10-21 16:43:08 -060033 .set_resources = pci_domain_set_resources,
Felix Heldb56ea252023-05-31 16:25:30 +020034 .scan_bus = amd_pci_domain_scan_bus,
Felix Held416cc662024-01-31 12:17:58 +010035 .init = amd_pci_domain_init,
Martin Rothf95a11e2022-10-21 16:43:08 -060036 .acpi_name = soc_acpi_name,
Felix Heldb56ea252023-05-31 16:25:30 +020037 .acpi_fill_ssdt = amd_pci_domain_fill_ssdt,
Martin Rothf95a11e2022-10-21 16:43:08 -060038};
39
40static void soc_init(void *chip_info)
41{
Felix Held1b410d92024-01-26 14:05:58 +010042 default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
Martin Rothf95a11e2022-10-21 16:43:08 -060043
Felix Held4e818c52024-01-18 21:43:30 +010044 amd_fsp_silicon_init();
Martin Rothf95a11e2022-10-21 16:43:08 -060045
Felix Held737c8c22024-02-06 18:42:22 +010046 data_fabric_print_mmio_conf();
Martin Rothf95a11e2022-10-21 16:43:08 -060047
48 fch_init(chip_info);
49}
50
51static void soc_final(void *chip_info)
52{
53 fch_final(chip_info);
54}
55
56struct chip_operations soc_amd_glinda_ops = {
Nicholas Sudsgaardbfb11be2024-01-30 09:53:46 +090057 .name = "AMD Glinda SoC",
Martin Rothf95a11e2022-10-21 16:43:08 -060058 .init = soc_init,
59 .final = soc_final
60};