Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | /* TODO: Update for Glinda */ |
| 4 | |
Felix Held | d9e8263 | 2024-01-26 14:22:31 +0100 | [diff] [blame^] | 5 | #include <amdblocks/acpi.h> |
Fred Reitberger | 31e6298 | 2022-10-31 14:18:20 -0400 | [diff] [blame] | 6 | #include <amdblocks/data_fabric.h> |
Felix Held | 4e818c5 | 2024-01-18 21:43:30 +0100 | [diff] [blame] | 7 | #include <amdblocks/fsp.h> |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 8 | #include <console/console.h> |
| 9 | #include <device/device.h> |
| 10 | #include <device/pci.h> |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 11 | #include <soc/cpu.h> |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 12 | #include <soc/pci_devs.h> |
| 13 | #include <soc/southbridge.h> |
| 14 | #include <types.h> |
| 15 | #include "chip.h" |
| 16 | |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 17 | static const char *soc_acpi_name(const struct device *dev) |
| 18 | { |
| 19 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 20 | return "PCI0"; |
| 21 | |
| 22 | if (dev->path.type != DEVICE_PATH_PCI) |
| 23 | return NULL; |
| 24 | |
| 25 | printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n", |
| 26 | PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); |
| 27 | return NULL; |
| 28 | }; |
| 29 | |
| 30 | struct device_operations glinda_pci_domain_ops = { |
Felix Held | b56ea25 | 2023-05-31 16:25:30 +0200 | [diff] [blame] | 31 | .read_resources = amd_pci_domain_read_resources, |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 32 | .set_resources = pci_domain_set_resources, |
Felix Held | b56ea25 | 2023-05-31 16:25:30 +0200 | [diff] [blame] | 33 | .scan_bus = amd_pci_domain_scan_bus, |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 34 | .acpi_name = soc_acpi_name, |
Felix Held | b56ea25 | 2023-05-31 16:25:30 +0200 | [diff] [blame] | 35 | .acpi_fill_ssdt = amd_pci_domain_fill_ssdt, |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 36 | }; |
| 37 | |
| 38 | static void soc_init(void *chip_info) |
| 39 | { |
Felix Held | 1b410d9 | 2024-01-26 14:05:58 +0100 | [diff] [blame] | 40 | default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables; |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 41 | |
Felix Held | 4e818c5 | 2024-01-18 21:43:30 +0100 | [diff] [blame] | 42 | amd_fsp_silicon_init(); |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 43 | |
| 44 | data_fabric_set_mmio_np(); |
| 45 | |
| 46 | fch_init(chip_info); |
| 47 | } |
| 48 | |
| 49 | static void soc_final(void *chip_info) |
| 50 | { |
| 51 | fch_final(chip_info); |
| 52 | } |
| 53 | |
| 54 | struct chip_operations soc_amd_glinda_ops = { |
| 55 | CHIP_NAME("AMD Glinda SoC") |
| 56 | .init = soc_init, |
| 57 | .final = soc_final |
| 58 | }; |