Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Arastra, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <arch/smp/mpspec.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 18 | #include <arch/ioapic.h> |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 19 | #include <device/pci.h> |
| 20 | #include <string.h> |
| 21 | #include <stdint.h> |
| 22 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 23 | static void *smp_write_config_table(void *v) |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 24 | { |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 25 | struct mp_config_table *mc; |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 26 | int bus_isa; |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 27 | u8 bus_pea0 = 0; |
| 28 | u8 bus_pea1 = 0; |
| 29 | u8 bus_aioc; |
| 30 | device_t dev; |
| 31 | |
| 32 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 33 | |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 34 | mptable_init(mc, LOCAL_APIC_ADDR); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 35 | |
| 36 | smp_write_processors(mc); |
| 37 | |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 38 | /* AIOC bridge */ |
| 39 | dev = dev_find_slot(0, PCI_DEVFN(0x04,0)); |
| 40 | if (dev) { |
| 41 | bus_aioc = pci_read_config8(dev, PCI_SECONDARY_BUS); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 42 | } |
| 43 | else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 44 | printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0\n"); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 45 | bus_aioc = 0; |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 46 | } |
| 47 | /* PCIe A0 */ |
| 48 | dev = dev_find_slot(0, PCI_DEVFN(0x02,0)); |
| 49 | if (dev) { |
| 50 | bus_pea0 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 51 | } |
| 52 | else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 53 | printk(BIOS_DEBUG, "ERROR - could not find PCI 0:02.0\n"); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 54 | bus_pea0 = 0; |
| 55 | } |
| 56 | /* PCIe A1 */ |
| 57 | dev = dev_find_slot(0, PCI_DEVFN(0x03,0)); |
| 58 | if (dev) { |
| 59 | bus_pea1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 60 | } |
| 61 | else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 62 | printk(BIOS_DEBUG, "ERROR - could not find PCI 0:03.0\n"); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 63 | bus_pea1 = 0; |
| 64 | } |
| 65 | |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 66 | mptable_write_buses(mc, NULL, &bus_isa); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 67 | |
| 68 | /* IOAPIC handling */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 69 | smp_write_ioapic(mc, 0x8, 0x20, VIO_APIC_VADDR); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 70 | |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 71 | mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 72 | |
| 73 | /* Standard local interrupt assignments */ |
Patrick Georgi | 6eb7a53 | 2011-10-07 21:42:52 +0200 | [diff] [blame] | 74 | mptable_lintsrc(mc, bus_isa); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 75 | |
| 76 | /* IMCH/IICH PCI devices */ |
| 77 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 78 | 0, (0x01<<2)|0, 0x8, 0x10); /* DMA controller */ |
| 79 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 80 | 0, (0x02<<2)|0, 0x8, 0x10); /* PCIe port A bridge */ |
| 81 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 82 | 0, (0x03<<2)|0, 0x8, 0x10); /* PCIe port A1 bridge */ |
| 83 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 84 | 0, (0x04<<2)|0, 0x8, 0x10); /* AIOC PCI bridge */ |
| 85 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 86 | 0, (0x1d<<2)|0, 0x8, 0x10); /* UHCI/EHCI */ |
| 87 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 88 | 0, (0x1f<<2)|1, 0x8, 0x11); /* SATA/SMBus */ |
| 89 | |
| 90 | if (bus_pea0) { |
| 91 | /* PCIe slot 0 */ |
| 92 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 93 | bus_pea0, (0<<2)|0, 0x8, 0x10); |
| 94 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 95 | bus_pea0, (0<<2)|1, 0x8, 0x11); |
| 96 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 97 | bus_pea0, (0<<2)|2, 0x8, 0x12); |
| 98 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 99 | bus_pea0, (0<<2)|3, 0x8, 0x13); |
| 100 | } |
| 101 | |
| 102 | if (bus_pea1) { |
| 103 | /* PCIe slots 1-4 */ |
| 104 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 105 | bus_pea1, (0<<2)|0, 0x8, 0x10); |
| 106 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 107 | bus_pea1, (0<<2)|1, 0x8, 0x11); |
| 108 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 109 | bus_pea1, (0<<2)|2, 0x8, 0x12); |
| 110 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 111 | bus_pea1, (0<<2)|3, 0x8, 0x13); |
| 112 | } |
| 113 | |
| 114 | if (bus_aioc) { |
| 115 | /* AIOC PCI devices */ |
| 116 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 117 | bus_aioc, (0<<2)|0, 0x8, 0x10); /* GbE0 */ |
| 118 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 119 | bus_aioc, (1<<2)|0, 0x8, 0x11); /* GbE1 */ |
| 120 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, |
| 121 | bus_aioc, (2<<2)|0, 0x8, 0x12); /* GbE2 */ |
| 122 | } |
| 123 | |
| 124 | /* There is no extension information... */ |
| 125 | |
| 126 | /* Compute the checksums */ |
Patrick Georgi | b0a9c5c | 2011-10-07 23:01:55 +0200 | [diff] [blame] | 127 | return mptable_finalize(mc); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | unsigned long write_smp_table(unsigned long addr) |
| 131 | { |
| 132 | void *v; |
Patrick Georgi | c75c79b | 2011-10-07 22:41:07 +0200 | [diff] [blame] | 133 | v = smp_write_floating_table(addr, 0); |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 134 | return (unsigned long)smp_write_config_table(v); |
| 135 | } |