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Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +02001chip northbridge/intel/sandybridge
2 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +02004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02009 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020010 register "gpu_panel_power_cycle_delay" = "1"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020015 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x06100610"
17
18 device cpu_cluster 0 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020019 chip cpu/intel/model_206ax
20 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010021 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010022 device lapic 0xacac off end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020023
Angel Pons6f56a232021-01-04 17:02:23 +010024 register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
25 register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
26 register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020027 end
28 end
29
Patrick Rudolph266a1f72016-06-09 18:13:34 +020030 register "pci_mmio_size" = "2048"
31
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020032 device domain 0 on
Peter Lemenkovf15f3102019-11-27 12:04:42 +010033 subsystemid 0x17aa 0x21ce inherit
34
35 device pci 00.0 on end # host bridge
Patrick Rudolph830fdc72016-04-21 07:15:14 +020036 device pci 01.0 on end # PCIe Bridge for discrete graphics
Peter Lemenkovf15f3102019-11-27 12:04:42 +010037 device pci 02.0 on end # Integrated Graphics Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020038
39 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
40 # GPI routing
41 # 0 No effect (default)
42 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
43 # 2 SCI (if corresponding GPIO_EN bit is also set)
44 register "alt_gp_smi_en" = "0x0000"
45 register "gpi1_routing" = "2"
46 register "gpi13_routing" = "2"
47
Iru Cai0bca3c92016-05-06 23:05:28 +080048 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
49 register "sata_port_map" = "0x1f"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020050 # Set max SATA speed to 6.0 Gb/s
51 register "sata_interface_speed_support" = "0x3"
52
53 register "gen1_dec" = "0x7c1601"
54 register "gen2_dec" = "0x0c15e1"
55 register "gen4_dec" = "0x0c06a1"
56
57 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
58
59 # Enable zero-based linear PCIe root port functions
60 register "pcie_port_coalesce" = "1"
Peter Lemenkovf15f3102019-11-27 12:04:42 +010061
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020062 register "c2_latency" = "101" # c2 not supported
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020063
Patrick Rudolphc670a412017-04-28 17:28:32 +020064 # device specific SPI configuration
65 register "spi_uvscc" = "0x2005"
66 register "spi_lvscc" = "0x2005"
67
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020068 device pci 16.0 off end # Management Engine Interface 1
69 device pci 16.1 off end # Management Engine Interface 2
70 device pci 16.2 off end # Management Engine IDE-R
71 device pci 16.3 off end # Management Engine KT
Peter Lemenkovf15f3102019-11-27 12:04:42 +010072 device pci 19.0 on end # Intel Gigabit Ethernet
73 device pci 1a.0 on end # USB Enhanced Host Controller #2
74 device pci 1b.0 on end # High Definition Audio Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020075 device pci 1c.0 off end # PCIe Port #1
Peter Lemenkovf15f3102019-11-27 12:04:42 +010076 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020077 device pci 1c.2 off end # PCIe Port #3
78 device pci 1c.3 on
Patrick Rudolph05216322019-04-12 16:14:27 +020079 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020080 end # PCIe Port #4 ExpressCard
81 device pci 1c.4 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020082 chip drivers/ricoh/rce822
83 register "sdwppol" = "1"
84 register "disable_mask" = "0x87"
Peter Lemenkovf15f3102019-11-27 12:04:42 +010085 device pci 00.0 on end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020086 end
87 end # PCIe Port #5 (Ricoh SD & FW)
88 device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
89 device pci 1c.6 off end # PCIe Port #7
90 device pci 1c.7 off end # PCIe Port #8
Peter Lemenkovf15f3102019-11-27 12:04:42 +010091 device pci 1d.0 on end # USB Enhanced Host Controller #1
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020092 device pci 1e.0 off end # PCI bridge
93 device pci 1f.0 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020094 chip ec/lenovo/pmh7
Peter Lemenkovf15f3102019-11-27 12:04:42 +010095 device pnp ff.1 on end # dummy
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020096 register "backlight_enable" = "0x01"
97 register "dock_event_enable" = "0x01"
98 end
99
100 chip drivers/pc80/tpm
101 device pnp 0c31.0 on end
102 end
103
104 chip ec/lenovo/h8
105 device pnp ff.2 on # dummy
106 io 0x60 = 0x62
107 io 0x62 = 0x66
108 io 0x64 = 0x1600
109 io 0x66 = 0x1604
110 end
111
112 register "config0" = "0xa7"
113 register "config1" = "0x01"
114 register "config2" = "0xa0"
115 register "config3" = "0xe2"
116
117 register "has_keyboard_backlight" = "0"
118
119 register "beepmask0" = "0x02"
120 register "beepmask1" = "0x86"
121 register "has_power_management_beeps" = "1"
122 register "event2_enable" = "0xff"
123 register "event3_enable" = "0xff"
124 register "event4_enable" = "0xf0"
125 register "event5_enable" = "0x3c"
126 register "event6_enable" = "0x00"
127 register "event7_enable" = "0xa1"
128 register "event8_enable" = "0x7b"
129 register "event9_enable" = "0xff"
130 register "eventa_enable" = "0x00"
131 register "eventb_enable" = "0x00"
132 register "eventc_enable" = "0xff"
133 register "eventd_enable" = "0xff"
134 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200135
136 register "has_bdc_detection" = "1"
137 register "bdc_gpio_num" = "54"
138 register "bdc_gpio_lvl" = "0"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200139 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200140 chip drivers/lenovo/hybrid_graphics
141 device pnp ff.f on end # dummy
142
143 register "detect_gpio" = "21"
144
145 register "has_panel_hybrid_gpio" = "1"
146 register "panel_hybrid_gpio" = "52"
147 register "panel_integrated_lvl" = "1"
148
149 register "has_backlight_gpio" = "0"
150 register "has_dgpu_power_gpio" = "0"
151
152 register "has_thinker1" = "1"
153 end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200154 end # LPC Controller
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100155 device pci 1f.2 on end # 6 port SATA AHCI Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200156 device pci 1f.3 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200157 # eeprom, 8 virtual devices, same chip
158 chip drivers/i2c/at24rf08c
159 device i2c 54 on end
160 device i2c 55 on end
161 device i2c 56 on end
162 device i2c 57 on end
163 device i2c 5c on end
164 device i2c 5d on end
165 device i2c 5e on end
166 device i2c 5f on end
167 end
168 end # SMBus Controller
169 device pci 1f.5 off end # SATA Controller 2
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100170 device pci 1f.6 on end # Thermal
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200171 end
172 end
173end