Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2008 coresystems GmbH |
| 5 | * Copyright (C) 2009 Thomas Jourdan <thomas.jourdan@gmail.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| 20 | * MA 02110-1301 USA |
| 21 | */ |
| 22 | |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 23 | #include <console/console.h> |
| 24 | #include <arch/io.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 25 | #include <arch/ioapic.h> |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 26 | #include <arch/smp/mpspec.h> |
| 27 | #include <device/pci.h> |
| 28 | #include <string.h> |
| 29 | #include <stdint.h> |
| 30 | |
| 31 | // Generate MP-table IRQ numbers for PCI devices. |
| 32 | #define IO_APIC0 2 |
| 33 | |
| 34 | #define INT_A 0 |
| 35 | #define INT_B 1 |
| 36 | #define INT_C 2 |
| 37 | #define INT_D 3 |
| 38 | #define PCI_IRQ(dev, intLine) (((dev)<<2) | intLine) |
| 39 | |
| 40 | #define PIRQ_A 16 |
| 41 | #define PIRQ_B 17 |
| 42 | #define PIRQ_C 18 |
| 43 | #define PIRQ_D 19 |
| 44 | #define PIRQ_E 20 |
| 45 | #define PIRQ_F 21 |
| 46 | #define PIRQ_G 22 |
| 47 | #define PIRQ_H 23 |
| 48 | |
| 49 | // RCBA |
| 50 | #define RCBA 0xF0 |
| 51 | |
| 52 | #define RCBA_D31IP 0x3100 |
| 53 | #define RCBA_D30IP 0x3104 |
| 54 | #define RCBA_D29IP 0x3108 |
| 55 | #define RCBA_D28IP 0x310C |
| 56 | #define RCBA_D31IR 0x3140 |
| 57 | #define RCBA_D30IR 0x3142 |
| 58 | #define RCBA_D29IR 0x3144 |
| 59 | #define RCBA_D28IR 0x3146 |
| 60 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 61 | static void *smp_write_config_table(void *v) |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 62 | { |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 63 | struct mp_config_table *mc; |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 64 | unsigned char bus_chipset, bus_pci; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 65 | unsigned char bus_pcie_a, bus_pcie_a1, bus_pcie_b; |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 66 | int bus_isa, i; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 67 | uint32_t pin, route; |
| 68 | device_t dev; |
| 69 | struct resource *res; |
| 70 | unsigned long rcba; |
| 71 | |
| 72 | dev = dev_find_slot(0, PCI_DEVFN(0x1F,0)); |
| 73 | res = find_resource(dev, RCBA); |
| 74 | if (!res) { |
Stefan Reinauer | c02c34e | 2010-04-07 02:30:57 +0000 | [diff] [blame] | 75 | return NULL; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 76 | } |
| 77 | rcba = res->base; |
| 78 | |
| 79 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 80 | |
Uwe Hermann | c36d506 | 2010-12-16 19:51:38 +0000 | [diff] [blame] | 81 | mptable_init(mc, LAPIC_ADDR); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 82 | |
| 83 | smp_write_processors(mc); |
| 84 | |
| 85 | /* Get bus numbers */ |
| 86 | bus_chipset = 0; |
| 87 | |
| 88 | /* PCI */ |
| 89 | dev = dev_find_slot(0, PCI_DEVFN(0x1E,0)); |
| 90 | if (dev) { |
| 91 | bus_pci = pci_read_config8(dev, PCI_SECONDARY_BUS); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 92 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 93 | printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n"); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 94 | bus_pci = 6; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | dev = dev_find_slot(0, PCI_DEVFN(2,0)); |
| 98 | if(dev) { |
| 99 | bus_pcie_a = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 100 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 101 | printk(BIOS_DEBUG, "ERROR - could not find PCIe Port A 0:2.0, using defaults\n"); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 102 | bus_pcie_a = 1; |
| 103 | } |
| 104 | |
| 105 | dev = dev_find_slot(0, PCI_DEVFN(3,0)); |
| 106 | if(dev) { |
| 107 | bus_pcie_a1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 108 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 109 | printk(BIOS_DEBUG, "ERROR - could not find PCIe Port B 0:3.0, using defaults\n"); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 110 | bus_pcie_a1 = 2; |
| 111 | } |
| 112 | |
| 113 | dev = dev_find_slot(0, PCI_DEVFN(0x1C,0)); |
| 114 | if(dev) { |
| 115 | bus_pcie_b = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 116 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 117 | printk(BIOS_DEBUG, "ERROR - could not find PCIe Port B 0:3.0, using defaults\n"); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 118 | bus_pcie_b = 3; |
| 119 | } |
| 120 | |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 121 | mptable_write_buses(mc, NULL, &bus_isa); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 122 | |
| 123 | /*I/O APICs: APIC ID Version State Address*/ |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 124 | smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); |
Uwe Hermann | f9892166 | 2010-10-31 19:37:50 +0000 | [diff] [blame] | 125 | |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 126 | mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 127 | |
| 128 | /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Tobias Diedrich | b907d32 | 2010-10-26 22:40:16 +0000 | [diff] [blame] | 129 | smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0, MP_APIC_ALL, 0); |
| 130 | smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0, MP_APIC_ALL, 1); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 131 | |
| 132 | /* Internal PCI device for i3100 */ |
| 133 | |
| 134 | /* EDMA |
| 135 | */ |
| 136 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(1, INT_A), IO_APIC0, PIRQ_A); |
| 137 | |
| 138 | /* PCIe Port A |
| 139 | */ |
| 140 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(2, INT_A), IO_APIC0, PIRQ_A); |
| 141 | |
| 142 | /* PCIe Port A1 |
| 143 | */ |
| 144 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(3, INT_A), IO_APIC0, PIRQ_A); |
| 145 | |
| 146 | /* PCIe Port B |
| 147 | */ |
| 148 | for(i = 0; i < 4; i++) { |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 149 | pin = (read32(rcba + RCBA_D28IP) >> (i * 4)) & 0x0F; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 150 | if(pin > 0) { |
| 151 | pin -= 1; |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 152 | route = PIRQ_A + ((read16(rcba + RCBA_D28IR) >> (pin * 4)) & 0x07); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 153 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(28, pin), IO_APIC0, route); |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | /* USB 1.1 : device 29, function 0, 1 |
| 158 | */ |
| 159 | for(i = 0; i < 2; i++) { |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 160 | pin = (read32(rcba + RCBA_D29IP) >> (i * 4)) & 0x0F; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 161 | if(pin > 0) { |
| 162 | pin -= 1; |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 163 | route = PIRQ_A + ((read16(rcba + RCBA_D29IR) >> (pin * 4)) & 0x07); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 164 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(29, pin), IO_APIC0, route); |
| 165 | } |
| 166 | } |
| 167 | |
| 168 | /* USB 2.0 : device 29, function 7 |
| 169 | */ |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 170 | pin = (read32(rcba + RCBA_D29IP) >> (7 * 4)) & 0x0F; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 171 | if(pin > 0) { |
| 172 | pin -= 1; |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 173 | route = PIRQ_A + ((read16(rcba + RCBA_D29IR) >> (pin * 4)) & 0x07); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 174 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(29, pin), IO_APIC0, route); |
| 175 | } |
| 176 | |
| 177 | /* SATA : device 31 function 2 |
| 178 | SMBus : device 31 function 3 |
| 179 | Performance counters : device 31 function 4 |
| 180 | */ |
| 181 | for(i = 2; i < 5; i++) { |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 182 | pin = (read32(rcba + RCBA_D31IP) >> (i * 4)) & 0x0F; |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 183 | if(pin > 0) { |
| 184 | pin -= 1; |
Stefan Reinauer | 9fe4d79 | 2010-01-16 17:53:38 +0000 | [diff] [blame] | 185 | route = PIRQ_A + ((read16(rcba + RCBA_D31IR) >> (pin * 4)) & 0x07); |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 186 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chipset, PCI_IRQ(31, pin), IO_APIC0, route); |
| 187 | } |
| 188 | } |
| 189 | |
| 190 | /* SLOTS */ |
| 191 | |
| 192 | /* PCIe 4x slot A |
| 193 | */ |
| 194 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a, PCI_IRQ(0, INT_A), IO_APIC0, PIRQ_A); |
| 195 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a, PCI_IRQ(0, INT_B), IO_APIC0, PIRQ_B); |
| 196 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a, PCI_IRQ(0, INT_C), IO_APIC0, PIRQ_C); |
| 197 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a, PCI_IRQ(0, INT_D), IO_APIC0, PIRQ_D); |
| 198 | |
| 199 | /* PCIe 4x slot A1 |
| 200 | */ |
| 201 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a1, PCI_IRQ(0, INT_A), IO_APIC0, PIRQ_A); |
| 202 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a1, PCI_IRQ(0, INT_B), IO_APIC0, PIRQ_B); |
| 203 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a1, PCI_IRQ(0, INT_C), IO_APIC0, PIRQ_C); |
| 204 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_a1, PCI_IRQ(0, INT_D), IO_APIC0, PIRQ_D); |
| 205 | |
| 206 | /* PCIe 4x slot B |
| 207 | */ |
| 208 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_b, PCI_IRQ(0, INT_A), IO_APIC0, PIRQ_A); |
| 209 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_b, PCI_IRQ(0, INT_B), IO_APIC0, PIRQ_B); |
| 210 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_b, PCI_IRQ(0, INT_C), IO_APIC0, PIRQ_C); |
| 211 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcie_b, PCI_IRQ(0, INT_D), IO_APIC0, PIRQ_D); |
| 212 | |
| 213 | /* PCI slot |
| 214 | */ |
| 215 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, PCI_IRQ(0, INT_A), IO_APIC0, PIRQ_A); |
| 216 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, PCI_IRQ(0, INT_B), IO_APIC0, PIRQ_B); |
| 217 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, PCI_IRQ(0, INT_C), IO_APIC0, PIRQ_C); |
| 218 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, PCI_IRQ(0, INT_D), IO_APIC0, PIRQ_D); |
| 219 | |
| 220 | /* There is no extension information... */ |
| 221 | |
| 222 | /* Compute the checksums */ |
| 223 | mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); |
| 224 | mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 225 | printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", |
Thomas Jourdan | 1a692d8 | 2009-07-01 17:01:17 +0000 | [diff] [blame] | 226 | mc, smp_next_mpe_entry(mc)); |
| 227 | return smp_next_mpe_entry(mc); |
| 228 | } |
| 229 | |
| 230 | unsigned long write_smp_table(unsigned long addr) |
| 231 | { |
| 232 | void *v; |
| 233 | v = smp_write_floating_table(addr); |
| 234 | return (unsigned long)smp_write_config_table(v); |
| 235 | } |