Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 1 | chip soc/intel/apollolake |
| 2 | |
| 3 | device cpu_cluster 0 on |
| 4 | device lapic 0 on end |
| 5 | end |
| 6 | |
Furquan Shaikh | 6d5e10c | 2018-03-14 19:57:16 -0700 | [diff] [blame] | 7 | register "pcie_rp_clkreq_pin[0]" = "0" # wifi/bt |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 8 | # Disable unused clkreq of PCIe root ports |
Furquan Shaikh | 6d5e10c | 2018-03-14 19:57:16 -0700 | [diff] [blame] | 9 | register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED" |
| 10 | register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" |
| 11 | register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED" |
| 12 | register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" |
| 13 | register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 14 | |
| 15 | # GPIO for PERST_0 |
| 16 | # If the Board has PERST_0 signal, assign the GPIO |
| 17 | # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF |
| 18 | register "prt0_gpio" = "GPIO_122" |
| 19 | |
| 20 | # GPIO for SD card detect |
| 21 | register "sdcard_cd_gpio" = "GPIO_177" |
| 22 | |
| 23 | # EMMC TX DATA Delay 1 |
| 24 | # Refer to EDS-Vol2-22.3. |
| 25 | # [14:8] steps of delay for HS400, each 125ps. |
| 26 | # [6:0] steps of delay for SDR104/HS200, each 125ps. |
| 27 | register "emmc_tx_data_cntl1" = "0x0C16" |
| 28 | |
| 29 | # EMMC TX DATA Delay 2 |
| 30 | # Refer to EDS-Vol2-22.3. |
| 31 | # [30:24] steps of delay for SDR50, each 125ps. |
| 32 | # [22:16] steps of delay for DDR50, each 125ps. |
| 33 | # [14:8] steps of delay for SDR25/HS50, each 125ps. |
| 34 | # [6:0] steps of delay for SDR12, each 125ps. |
| 35 | register "emmc_tx_data_cntl2" = "0x28162828" |
| 36 | |
| 37 | # EMMC RX CMD/DATA Delay 1 |
| 38 | # Refer to EDS-Vol2-22.3. |
| 39 | # [30:24] steps of delay for SDR50, each 125ps. |
| 40 | # [22:16] steps of delay for DDR50, each 125ps. |
| 41 | # [14:8] steps of delay for SDR25/HS50, each 125ps. |
| 42 | # [6:0] steps of delay for SDR12, each 125ps. |
| 43 | register "emmc_rx_cmd_data_cntl1" = "0x00181717" |
| 44 | |
| 45 | # EMMC RX CMD/DATA Delay 2 |
| 46 | # Refer to EDS-Vol2-22.3. |
| 47 | # [17:16] stands for Rx Clock before Output Buffer |
| 48 | # [14:8] steps of delay for Auto Tuning Mode, each 125ps. |
| 49 | # [6:0] steps of delay for HS200, each 125ps. |
| 50 | register "emmc_rx_cmd_data_cntl2" = "0x10008" |
| 51 | |
| 52 | # Enable DPTF |
| 53 | register "dptf_enable" = "1" |
| 54 | |
Sumeet R Pawnikar | 2adb50d | 2020-05-09 15:37:09 +0530 | [diff] [blame] | 55 | # PL1 override 12 W: the energy calculation is wrong with the |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 56 | # current VR solution. Experiments show that SoC TDP max (6W) can |
| 57 | # be reached when RAPL PL1 is set to 12W. |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 58 | # Set RAPL PL2 to 15W. |
Sumeet R Pawnikar | 2adb50d | 2020-05-09 15:37:09 +0530 | [diff] [blame] | 59 | register "power_limits_config" = "{ |
| 60 | .tdp_pl1_override = 12, |
| 61 | .tdp_pl2_override = 15, |
| 62 | }" |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 63 | |
| 64 | # Enable Audio Clock and Power gating |
| 65 | register "hdaudio_clk_gate_enable" = "1" |
| 66 | register "hdaudio_pwr_gate_enable" = "1" |
| 67 | register "hdaudio_bios_config_lockdown" = "1" |
| 68 | |
| 69 | # Enable lpss s0ix |
| 70 | register "lpss_s0ix_enable" = "1" |
| 71 | |
| 72 | # GPE configuration |
| 73 | # Note that GPE events called out in ASL code rely on this |
| 74 | # route, i.e., if this route changes then the affected GPE |
| 75 | # offset bits also need to be changed. This sets the PMC register |
| 76 | # GPE_CFG fields. |
| 77 | register "gpe0_dw1" = "PMC_GPE_N_31_0" |
| 78 | register "gpe0_dw2" = "PMC_GPE_N_63_32" |
| 79 | register "gpe0_dw3" = "PMC_GPE_SW_31_0" |
| 80 | |
Subrata Banik | c4986eb | 2018-05-09 14:55:09 +0530 | [diff] [blame] | 81 | # Intel Common SoC Config |
| 82 | #+-------------------+---------------------------+ |
| 83 | #| Field | Value | |
| 84 | #+-------------------+---------------------------+ |
| 85 | #| I2C0 | Audio | |
| 86 | #| I2C2 | TPM | |
| 87 | #| I2C3 | Touchscreen | |
| 88 | #| I2C4 | Trackpad | |
| 89 | #| I2C5 | Digitizer | |
| 90 | #+-------------------+---------------------------+ |
| 91 | register "common_soc_config" = "{ |
| 92 | .i2c[0] = { |
| 93 | .speed = I2C_SPEED_FAST, |
| 94 | .rise_time_ns = 104, |
| 95 | .fall_time_ns = 52, |
| 96 | }, |
| 97 | .i2c[2] = { |
| 98 | .early_init = 1, |
| 99 | .speed = I2C_SPEED_FAST, |
| 100 | .rise_time_ns = 57, |
| 101 | .fall_time_ns = 28, |
| 102 | }, |
| 103 | .i2c[3] = { |
| 104 | .speed = I2C_SPEED_FAST, |
| 105 | .rise_time_ns = 76, |
| 106 | .fall_time_ns = 164, |
| 107 | }, |
| 108 | .i2c[4] = { |
| 109 | .speed = I2C_SPEED_FAST, |
| 110 | .rise_time_ns = 114, |
| 111 | .fall_time_ns = 164, |
| 112 | .data_hold_time_ns = 350, |
| 113 | }, |
| 114 | .i2c[5] = { |
| 115 | .speed = I2C_SPEED_FAST, |
| 116 | .rise_time_ns = 152, |
| 117 | .fall_time_ns = 30, |
| 118 | }, |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 119 | }" |
| 120 | |
| 121 | # Minimum SLP S3 assertion width 28ms. |
| 122 | register "slp_s3_assertion_width_usecs" = "28000" |
| 123 | |
| 124 | device domain 0 on |
| 125 | device pci 00.0 on end # - Host Bridge |
| 126 | device pci 00.1 on end # - DPTF |
| 127 | device pci 00.2 on end # - NPK |
Matt DeVillier | 2ece212 | 2020-04-30 10:55:32 -0500 | [diff] [blame] | 128 | device pci 02.0 on # - Gen |
| 129 | register "gfx" = "GMA_DEFAULT_PANEL(0)" |
| 130 | end |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 131 | device pci 03.0 on end # - Iunit |
| 132 | device pci 0d.0 on end # - P2SB |
| 133 | device pci 0d.1 on end # - PMC |
| 134 | device pci 0d.2 on end # - SPI |
| 135 | device pci 0d.3 on end # - Shared SRAM |
| 136 | device pci 0e.0 on # - Audio |
| 137 | chip drivers/generic/max98357a |
Aamir Bohra | a1c82c5 | 2020-03-16 18:57:48 +0530 | [diff] [blame] | 138 | register "hid" = ""MX98357A"" |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 139 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" |
| 140 | register "sdmode_delay" = "5" |
| 141 | device generic 0 on end |
| 142 | end |
| 143 | end |
Subrata Banik | e9b9373 | 2020-09-17 15:48:54 +0530 | [diff] [blame] | 144 | device pci 0f.0 on end # - CSE |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 145 | device pci 11.0 off end # - ISH |
| 146 | device pci 12.0 off end # - SATA |
| 147 | device pci 13.0 off end # - Root Port 2 - PCIe-A 0 |
| 148 | device pci 13.1 off end # - Root Port 3 - PCIe-A 1 |
| 149 | device pci 13.2 off end # - Root Port 4 - PCIe-A 2 |
| 150 | device pci 13.3 off end # - Root Port 5 - PCIe-A 3 |
| 151 | device pci 14.0 on |
Furquan Shaikh | a266d1e | 2020-10-04 12:52:54 -0700 | [diff] [blame] | 152 | chip drivers/wifi/generic |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 153 | register "wake" = "GPE0_DW3_00" |
| 154 | device pci 00.0 on end |
| 155 | end |
| 156 | end # - Root Port 0 - PCIe-B 0 - Wifi |
| 157 | device pci 14.1 off end # - Root Port 1 - PCIe-B 1 |
| 158 | device pci 15.0 on end # - XHCI |
| 159 | device pci 15.1 off end # - XDCI |
| 160 | device pci 16.0 on # - I2C 0 |
| 161 | chip drivers/i2c/da7219 |
| 162 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_116_IRQ)" |
| 163 | register "btn_cfg" = "50" |
| 164 | register "mic_det_thr" = "500" |
| 165 | register "jack_ins_deb" = "20" |
| 166 | register "jack_det_rate" = ""32ms_64ms"" |
| 167 | register "jack_rem_deb" = "1" |
| 168 | register "a_d_btn_thr" = "0xa" |
| 169 | register "d_b_btn_thr" = "0x16" |
| 170 | register "b_c_btn_thr" = "0x21" |
| 171 | register "c_mic_btn_thr" = "0x3e" |
| 172 | register "btn_avg" = "4" |
| 173 | register "adc_1bit_rpt" = "1" |
| 174 | register "micbias_lvl" = "2600" |
| 175 | register "mic_amp_in_sel" = ""diff"" |
| 176 | device i2c 1a on end |
| 177 | end |
| 178 | end |
| 179 | device pci 16.1 on end # - I2C 1 |
| 180 | device pci 16.2 on |
| 181 | chip drivers/i2c/tpm |
| 182 | register "hid" = ""GOOG0005"" |
| 183 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_28_IRQ)" |
| 184 | device i2c 50 on end |
| 185 | end |
| 186 | end # - I2C 2 |
| 187 | device pci 16.3 on |
| 188 | chip drivers/i2c/generic |
| 189 | register "hid" = ""ELAN0001"" |
| 190 | register "desc" = ""ELAN Touchscreen"" |
Matt DeVillier | 48894ea | 2022-12-20 16:31:51 -0600 | [diff] [blame] | 191 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_21_IRQ)" |
Matt DeVillier | a0e32aa | 2022-12-20 16:33:12 -0600 | [diff] [blame] | 192 | register "detect" = "1" |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 193 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" |
| 194 | register "reset_delay_ms" = "20" |
| 195 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" |
| 196 | register "enable_delay_ms" = "1" |
| 197 | register "has_power_resource" = "1" |
| 198 | device i2c 10 on end |
| 199 | end |
Sheng-Liang Pan | 45448ed | 2017-08-28 17:25:40 +0800 | [diff] [blame] | 200 | chip drivers/i2c/generic |
| 201 | register "hid" = ""RAYD0001"" |
| 202 | register "desc" = ""Raydium Touchscreen"" |
Matt DeVillier | 48894ea | 2022-12-20 16:31:51 -0600 | [diff] [blame] | 203 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_21_IRQ)" |
Matt DeVillier | a0e32aa | 2022-12-20 16:33:12 -0600 | [diff] [blame] | 204 | register "detect" = "1" |
Sheng-Liang Pan | 19ba2e02 | 2017-10-31 11:15:24 +0800 | [diff] [blame] | 205 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" |
| 206 | register "reset_delay_ms" = "1" |
| 207 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" |
| 208 | register "enable_delay_ms" = "50" |
| 209 | register "has_power_resource" = "1" |
Sheng-Liang Pan | 45448ed | 2017-08-28 17:25:40 +0800 | [diff] [blame] | 210 | device i2c 39 on end |
| 211 | end |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 212 | end # - I2C 3 |
| 213 | device pci 17.0 on |
| 214 | chip drivers/i2c/generic |
| 215 | register "hid" = ""ELAN0000"" |
| 216 | register "desc" = ""ELAN Touchpad"" |
Matt DeVillier | 48894ea | 2022-12-20 16:31:51 -0600 | [diff] [blame] | 217 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_18_IRQ)" |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 218 | register "wake" = "GPE0_DW1_15" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 219 | register "detect" = "1" |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 220 | device i2c 15 on end |
| 221 | end |
Peggy Chuang | 7a2d4e5 | 2017-09-26 20:45:59 +0800 | [diff] [blame] | 222 | chip drivers/i2c/hid |
Matt DeVillier | 6a803bf | 2022-12-19 15:17:06 -0600 | [diff] [blame^] | 223 | register "generic.hid" = ""SYNA0000"" |
| 224 | register "generic.cid" = ""ACPI0C50"" |
Peggy Chuang | 7a2d4e5 | 2017-09-26 20:45:59 +0800 | [diff] [blame] | 225 | register "generic.desc" = ""Synaptics Touchpad"" |
Karthikeyan Ramasubramanian | 3614270 | 2020-11-10 14:57:10 -0700 | [diff] [blame] | 226 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_18_IRQ)" |
Peggy Chuang | 7a2d4e5 | 2017-09-26 20:45:59 +0800 | [diff] [blame] | 227 | register "generic.wake" = "GPE0_DW1_15" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 228 | register "generic.detect" = "1" |
Peggy Chuang | 7a2d4e5 | 2017-09-26 20:45:59 +0800 | [diff] [blame] | 229 | register "hid_desc_reg_offset" = "0x20" |
| 230 | device i2c 0x2c on end |
| 231 | end |
Tim Chen | 1f3af89 | 2017-08-21 17:11:39 +0800 | [diff] [blame] | 232 | end # - I2C 4 |
| 233 | device pci 17.1 on |
| 234 | chip drivers/i2c/hid |
| 235 | register "generic.hid" = ""WCOM50C1"" |
| 236 | register "generic.desc" = ""WCOM Digitizer"" |
| 237 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_13_IRQ)" |
| 238 | register "hid_desc_reg_offset" = "0x1" |
| 239 | device i2c 0x9 on end |
| 240 | end |
| 241 | end # - I2C 5 |
| 242 | device pci 17.2 off end # - I2C 6 |
| 243 | device pci 17.3 off end # - I2C 7 |
| 244 | device pci 18.0 on end # - UART 0 |
| 245 | device pci 18.1 on end # - UART 1 |
| 246 | device pci 18.2 on end # - UART 2 |
| 247 | device pci 18.3 off end # - UART 3 |
| 248 | device pci 19.0 on end # - SPI 0 |
| 249 | device pci 19.1 off end # - SPI 1 |
| 250 | device pci 19.2 off end # - SPI 2 |
| 251 | device pci 1a.0 on end # - PWM |
| 252 | device pci 1b.0 on end # - SDCARD |
| 253 | device pci 1c.0 on end # - eMMC |
| 254 | device pci 1e.0 off end # - SDIO |
| 255 | device pci 1f.0 on # - LPC |
| 256 | chip ec/google/chromeec |
| 257 | device pnp 0c09.0 on end |
| 258 | end |
| 259 | end |
| 260 | device pci 1f.1 on end # - SMBUS |
| 261 | end |
| 262 | end |