blob: c1b70677115dad8ff9356c7b06a5d7c924b08db2 [file] [log] [blame]
Tim Chen1f3af892017-08-21 17:11:39 +08001chip soc/intel/apollolake
2
3 device cpu_cluster 0 on
4 device lapic 0 on end
5 end
6
Furquan Shaikh6d5e10c2018-03-14 19:57:16 -07007 register "pcie_rp_clkreq_pin[0]" = "0" # wifi/bt
Tim Chen1f3af892017-08-21 17:11:39 +08008 # Disable unused clkreq of PCIe root ports
Furquan Shaikh6d5e10c2018-03-14 19:57:16 -07009 register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
10 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
11 register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
12 register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
13 register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
Tim Chen1f3af892017-08-21 17:11:39 +080014
15 # GPIO for PERST_0
16 # If the Board has PERST_0 signal, assign the GPIO
17 # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
18 register "prt0_gpio" = "GPIO_122"
19
20 # GPIO for SD card detect
21 register "sdcard_cd_gpio" = "GPIO_177"
22
23 # EMMC TX DATA Delay 1
24 # Refer to EDS-Vol2-22.3.
25 # [14:8] steps of delay for HS400, each 125ps.
26 # [6:0] steps of delay for SDR104/HS200, each 125ps.
27 register "emmc_tx_data_cntl1" = "0x0C16"
28
29 # EMMC TX DATA Delay 2
30 # Refer to EDS-Vol2-22.3.
31 # [30:24] steps of delay for SDR50, each 125ps.
32 # [22:16] steps of delay for DDR50, each 125ps.
33 # [14:8] steps of delay for SDR25/HS50, each 125ps.
34 # [6:0] steps of delay for SDR12, each 125ps.
35 register "emmc_tx_data_cntl2" = "0x28162828"
36
37 # EMMC RX CMD/DATA Delay 1
38 # Refer to EDS-Vol2-22.3.
39 # [30:24] steps of delay for SDR50, each 125ps.
40 # [22:16] steps of delay for DDR50, each 125ps.
41 # [14:8] steps of delay for SDR25/HS50, each 125ps.
42 # [6:0] steps of delay for SDR12, each 125ps.
43 register "emmc_rx_cmd_data_cntl1" = "0x00181717"
44
45 # EMMC RX CMD/DATA Delay 2
46 # Refer to EDS-Vol2-22.3.
47 # [17:16] stands for Rx Clock before Output Buffer
48 # [14:8] steps of delay for Auto Tuning Mode, each 125ps.
49 # [6:0] steps of delay for HS200, each 125ps.
50 register "emmc_rx_cmd_data_cntl2" = "0x10008"
51
52 # Enable DPTF
53 register "dptf_enable" = "1"
54
55 # PL1 override 12000 mW: the energy calculation is wrong with the
56 # current VR solution. Experiments show that SoC TDP max (6W) can
57 # be reached when RAPL PL1 is set to 12W.
58 register "tdp_pl1_override_mw" = "12000"
59 # Set RAPL PL2 to 15W.
60 register "tdp_pl2_override_mw" = "15000"
61
62 # Enable Audio Clock and Power gating
63 register "hdaudio_clk_gate_enable" = "1"
64 register "hdaudio_pwr_gate_enable" = "1"
65 register "hdaudio_bios_config_lockdown" = "1"
66
67 # Enable lpss s0ix
68 register "lpss_s0ix_enable" = "1"
69
70 # GPE configuration
71 # Note that GPE events called out in ASL code rely on this
72 # route, i.e., if this route changes then the affected GPE
73 # offset bits also need to be changed. This sets the PMC register
74 # GPE_CFG fields.
75 register "gpe0_dw1" = "PMC_GPE_N_31_0"
76 register "gpe0_dw2" = "PMC_GPE_N_63_32"
77 register "gpe0_dw3" = "PMC_GPE_SW_31_0"
78
79 # Enable I2C0 for audio codec at 400kHz
80 register "i2c[0]" = "{
81 .speed = I2C_SPEED_FAST,
82 .rise_time_ns = 104,
83 .fall_time_ns = 52,
84 }"
85
86 # Enable I2C2 bus early for TPM at 400kHz
87 register "i2c[2]" = "{
88 .early_init = 1,
89 .speed = I2C_SPEED_FAST,
90 .rise_time_ns = 57,
91 .fall_time_ns = 28,
92 }"
93
94 # touchscreen at 400kHz
95 register "i2c[3]" = "{
96 .speed = I2C_SPEED_FAST,
97 .rise_time_ns = 76,
98 .fall_time_ns = 164,
99 }"
100
101 # trackpad at 400kHz
102 register "i2c[4]" = "{
103 .speed = I2C_SPEED_FAST,
104 .rise_time_ns = 114,
105 .fall_time_ns = 164,
106 .data_hold_time_ns = 350,
107 }"
108
109 # digitizer at 400kHz
110 register "i2c[5]" = "{
111 .speed = I2C_SPEED_FAST,
112 .rise_time_ns = 152,
113 .fall_time_ns = 30,
114 }"
115
116 # Minimum SLP S3 assertion width 28ms.
117 register "slp_s3_assertion_width_usecs" = "28000"
118
119 device domain 0 on
120 device pci 00.0 on end # - Host Bridge
121 device pci 00.1 on end # - DPTF
122 device pci 00.2 on end # - NPK
123 device pci 02.0 on end # - Gen
124 device pci 03.0 on end # - Iunit
125 device pci 0d.0 on end # - P2SB
126 device pci 0d.1 on end # - PMC
127 device pci 0d.2 on end # - SPI
128 device pci 0d.3 on end # - Shared SRAM
129 device pci 0e.0 on # - Audio
130 chip drivers/generic/max98357a
131 register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
132 register "sdmode_delay" = "5"
133 device generic 0 on end
134 end
135 end
136 device pci 11.0 off end # - ISH
137 device pci 12.0 off end # - SATA
138 device pci 13.0 off end # - Root Port 2 - PCIe-A 0
139 device pci 13.1 off end # - Root Port 3 - PCIe-A 1
140 device pci 13.2 off end # - Root Port 4 - PCIe-A 2
141 device pci 13.3 off end # - Root Port 5 - PCIe-A 3
142 device pci 14.0 on
143 chip drivers/intel/wifi
144 register "wake" = "GPE0_DW3_00"
145 device pci 00.0 on end
146 end
147 end # - Root Port 0 - PCIe-B 0 - Wifi
148 device pci 14.1 off end # - Root Port 1 - PCIe-B 1
149 device pci 15.0 on end # - XHCI
150 device pci 15.1 off end # - XDCI
151 device pci 16.0 on # - I2C 0
152 chip drivers/i2c/da7219
153 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_116_IRQ)"
154 register "btn_cfg" = "50"
155 register "mic_det_thr" = "500"
156 register "jack_ins_deb" = "20"
157 register "jack_det_rate" = ""32ms_64ms""
158 register "jack_rem_deb" = "1"
159 register "a_d_btn_thr" = "0xa"
160 register "d_b_btn_thr" = "0x16"
161 register "b_c_btn_thr" = "0x21"
162 register "c_mic_btn_thr" = "0x3e"
163 register "btn_avg" = "4"
164 register "adc_1bit_rpt" = "1"
165 register "micbias_lvl" = "2600"
166 register "mic_amp_in_sel" = ""diff""
167 device i2c 1a on end
168 end
169 end
170 device pci 16.1 on end # - I2C 1
171 device pci 16.2 on
172 chip drivers/i2c/tpm
173 register "hid" = ""GOOG0005""
174 register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_28_IRQ)"
175 device i2c 50 on end
176 end
177 end # - I2C 2
178 device pci 16.3 on
179 chip drivers/i2c/generic
180 register "hid" = ""ELAN0001""
181 register "desc" = ""ELAN Touchscreen""
182 register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_21_IRQ)"
183 register "probed" = "1"
184 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)"
185 register "reset_delay_ms" = "20"
186 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
187 register "enable_delay_ms" = "1"
188 register "has_power_resource" = "1"
189 device i2c 10 on end
190 end
Sheng-Liang Pan45448ed2017-08-28 17:25:40 +0800191 chip drivers/i2c/generic
192 register "hid" = ""RAYD0001""
193 register "desc" = ""Raydium Touchscreen""
194 register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_21_IRQ)"
195 register "probed" = "1"
Sheng-Liang Pan19ba2e022017-10-31 11:15:24 +0800196 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)"
197 register "reset_delay_ms" = "1"
198 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
199 register "enable_delay_ms" = "50"
200 register "has_power_resource" = "1"
Sheng-Liang Pan45448ed2017-08-28 17:25:40 +0800201 device i2c 39 on end
202 end
Tim Chen1f3af892017-08-21 17:11:39 +0800203 end # - I2C 3
204 device pci 17.0 on
205 chip drivers/i2c/generic
206 register "hid" = ""ELAN0000""
207 register "desc" = ""ELAN Touchpad""
208 register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_18_IRQ)"
209 register "wake" = "GPE0_DW1_15"
210 register "probed" = "1"
211 device i2c 15 on end
212 end
Peggy Chuang7a2d4e52017-09-26 20:45:59 +0800213 chip drivers/i2c/hid
214 register "generic.hid" = ""PNP0C50""
215 register "generic.desc" = ""Synaptics Touchpad""
216 register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_18_IRQ)"
217 register "generic.wake" = "GPE0_DW1_15"
218 register "generic.probed" = "1"
219 register "hid_desc_reg_offset" = "0x20"
220 device i2c 0x2c on end
221 end
Tim Chen1f3af892017-08-21 17:11:39 +0800222 end # - I2C 4
223 device pci 17.1 on
224 chip drivers/i2c/hid
225 register "generic.hid" = ""WCOM50C1""
226 register "generic.desc" = ""WCOM Digitizer""
227 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_13_IRQ)"
228 register "hid_desc_reg_offset" = "0x1"
229 device i2c 0x9 on end
230 end
231 end # - I2C 5
232 device pci 17.2 off end # - I2C 6
233 device pci 17.3 off end # - I2C 7
234 device pci 18.0 on end # - UART 0
235 device pci 18.1 on end # - UART 1
236 device pci 18.2 on end # - UART 2
237 device pci 18.3 off end # - UART 3
238 device pci 19.0 on end # - SPI 0
239 device pci 19.1 off end # - SPI 1
240 device pci 19.2 off end # - SPI 2
241 device pci 1a.0 on end # - PWM
242 device pci 1b.0 on end # - SDCARD
243 device pci 1c.0 on end # - eMMC
244 device pci 1e.0 off end # - SDIO
245 device pci 1f.0 on # - LPC
246 chip ec/google/chromeec
247 device pnp 0c09.0 on end
248 end
249 end
250 device pci 1f.1 on end # - SMBUS
251 end
252end