blob: 2ae5303e8ed64f6e2b997b987007ebd34d9f7a82 [file] [log] [blame]
Eric Biederman8ca8d762003-04-22 19:02:15 +00001static void write_phys(unsigned long addr, unsigned long value)
2{
Eric Biederman8d9c1232003-06-17 08:42:17 +00003#if HAVE_MOVNTI
4 asm volatile(
5 "movnti %1, (%0)"
6 : /* outputs */
7 : "r" (addr), "r" (value) /* inputs */
Stefan Reinauer76712932004-05-27 11:13:24 +00008#ifndef __GNUC__
Eric Biederman8d9c1232003-06-17 08:42:17 +00009 : /* clobbers */
Stefan Reinauer76712932004-05-27 11:13:24 +000010#endif
Eric Biederman8d9c1232003-06-17 08:42:17 +000011 );
12#else
Eric Biederman52685572003-05-19 19:16:21 +000013 volatile unsigned long *ptr;
Eric Biederman8ca8d762003-04-22 19:02:15 +000014 ptr = (void *)addr;
15 *ptr = value;
Eric Biederman8d9c1232003-06-17 08:42:17 +000016#endif
Eric Biederman8ca8d762003-04-22 19:02:15 +000017}
18
19static unsigned long read_phys(unsigned long addr)
20{
Eric Biederman52685572003-05-19 19:16:21 +000021 volatile unsigned long *ptr;
Eric Biederman8ca8d762003-04-22 19:02:15 +000022 ptr = (void *)addr;
23 return *ptr;
24}
25
Eric Biederman8d9c1232003-06-17 08:42:17 +000026static void ram_fill(unsigned long start, unsigned long stop)
Eric Biederman8ca8d762003-04-22 19:02:15 +000027{
28 unsigned long addr;
29 /*
30 * Fill.
31 */
32 print_debug("DRAM fill: ");
33 print_debug_hex32(start);
34 print_debug("-");
35 print_debug_hex32(stop);
36 print_debug("\r\n");
37 for(addr = start; addr < stop ; addr += 4) {
38 /* Display address being filled */
Eric Biederman8d9c1232003-06-17 08:42:17 +000039 if (!(addr & 0xffff)) {
Eric Biederman8ca8d762003-04-22 19:02:15 +000040 print_debug_hex32(addr);
Eric Biederman69afe282004-11-11 06:53:24 +000041 print_debug(" \r");
Eric Biederman8ca8d762003-04-22 19:02:15 +000042 }
43 write_phys(addr, addr);
44 };
45 /* Display final address */
46 print_debug_hex32(addr);
47 print_debug("\r\nDRAM filled\r\n");
48}
49
Eric Biederman8d9c1232003-06-17 08:42:17 +000050static void ram_verify(unsigned long start, unsigned long stop)
Eric Biederman8ca8d762003-04-22 19:02:15 +000051{
52 unsigned long addr;
Eric Biederman69afe282004-11-11 06:53:24 +000053 int i = 0;
Eric Biederman8ca8d762003-04-22 19:02:15 +000054 /*
55 * Verify.
56 */
57 print_debug("DRAM verify: ");
58 print_debug_hex32(start);
59 print_debug_char('-');
60 print_debug_hex32(stop);
61 print_debug("\r\n");
62 for(addr = start; addr < stop ; addr += 4) {
63 unsigned long value;
64 /* Display address being tested */
Eric Biederman8d9c1232003-06-17 08:42:17 +000065 if (!(addr & 0xffff)) {
Eric Biederman8ca8d762003-04-22 19:02:15 +000066 print_debug_hex32(addr);
Eric Biederman69afe282004-11-11 06:53:24 +000067 print_debug(" \r");
Eric Biederman8ca8d762003-04-22 19:02:15 +000068 }
69 value = read_phys(addr);
70 if (value != addr) {
71 /* Display address with error */
72 print_err_hex32(addr);
73 print_err_char(':');
74 print_err_hex32(value);
75 print_err("\r\n");
Eric Biederman69afe282004-11-11 06:53:24 +000076 i++;
77 if(i>256) break;
Eric Biederman8ca8d762003-04-22 19:02:15 +000078 }
79 }
80 /* Display final address */
81 print_debug_hex32(addr);
82 print_debug("\r\nDRAM verified\r\n");
83}
84
85
Eric Biederman8d9c1232003-06-17 08:42:17 +000086void ram_check(unsigned long start, unsigned long stop)
Eric Biederman8ca8d762003-04-22 19:02:15 +000087{
88 int result;
89 /*
90 * This is much more of a "Is my DRAM properly configured?"
91 * test than a "Is my DRAM faulty?" test. Not all bits
92 * are tested. -Tyson
93 */
Ronald G. Minnichbfdc5622004-03-22 04:24:29 +000094 print_debug("Testing DRAM : ");
95 print_debug_hex32(start);
96 print_debug("-");
97 print_debug_hex32(stop);
98 print_debug("\r\n");
Eric Biederman8ca8d762003-04-22 19:02:15 +000099 ram_fill(start, stop);
100 ram_verify(start, stop);
Ronald G. Minnichbfdc5622004-03-22 04:24:29 +0000101 print_debug("Done.\r\n");
Eric Biederman8ca8d762003-04-22 19:02:15 +0000102}
103