Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 4 | # |
| 5 | # This program is free software; you can redistribute it and/or modify |
| 6 | # it under the terms of the GNU General Public License as published by |
| 7 | # the Free Software Foundation; either version 2 of the License, or |
| 8 | # (at your option) any later version. |
| 9 | # |
| 10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | # GNU General Public License for more details. |
| 14 | # |
| 15 | |
| 16 | chip northbridge/intel/sandybridge |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 17 | device cpu_cluster 0x0 on |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 18 | chip cpu/intel/model_206ax |
| 19 | register "c1_acpower" = "1" |
| 20 | register "c1_battery" = "1" |
| 21 | register "c2_acpower" = "3" |
| 22 | register "c2_battery" = "3" |
| 23 | register "c3_acpower" = "5" |
| 24 | register "c3_battery" = "5" |
Arthur Heymans | 7e6946a | 2019-01-21 17:55:02 +0100 | [diff] [blame] | 25 | device lapic 0x0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 26 | device lapic 0xacac off end |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 27 | end |
| 28 | end |
| 29 | device domain 0x0 on |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 30 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 31 | register "c2_latency" = "0x0065" |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 32 | register "gen1_dec" = "0x000c0291" |
| 33 | register "gen2_dec" = "0x000c0a01" |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 34 | register "pcie_port_coalesce" = "1" |
| 35 | register "sata_interface_speed_support" = "0x3" |
| 36 | register "sata_port_map" = "0x33" |
Nicola Corna | e134db2 | 2018-04-02 10:27:06 +0200 | [diff] [blame] | 37 | register "spi.opprefixes" = "{ 0x50, 0x06 }" |
Arthur Heymans | ebf201b | 2019-05-28 13:51:36 +0200 | [diff] [blame] | 38 | register "spi.ops" = "{{0x01, WRITE_NO_ADDR}, |
| 39 | {0x02, WRITE_WITH_ADDR}, |
| 40 | {0x03, READ_WITH_ADDR}, |
| 41 | {0x05, READ_NO_ADDR}, |
| 42 | {0x20, WRITE_WITH_ADDR}, |
| 43 | {0x9f, READ_NO_ADDR}, |
| 44 | {0xad, WRITE_NO_ADDR}, |
| 45 | {0x04, WRITE_NO_ADDR}}" |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 46 | device pci 16.0 on # Management Engine Interface 1 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 47 | subsystemid 0x174b 0x1007 |
| 48 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 49 | device pci 16.1 off end # Management Engine Interface 2 |
| 50 | device pci 16.2 off end # Management Engine IDE-R |
| 51 | device pci 16.3 off end # Management Engine KT |
| 52 | device pci 19.0 off end # Intel Gigabit Ethernet |
| 53 | device pci 1a.0 on # USB2 EHCI #2 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 54 | subsystemid 0x174b 0x1007 |
| 55 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 56 | device pci 1b.0 on # HD Audio Controller |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 57 | subsystemid 0x8086 0x1c20 |
| 58 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 59 | device pci 1c.0 on # PCIe Port #1 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 60 | subsystemid 0x174b 0x1007 |
| 61 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 62 | device pci 1c.1 off end # PCIe Port #2 |
| 63 | device pci 1c.2 off end # PCIe Port #3 |
| 64 | device pci 1c.3 off end # PCIe Port #4 |
| 65 | device pci 1c.4 on # PCIe Port #5 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 66 | subsystemid 0x174b 0x1007 |
| 67 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 68 | device pci 1c.5 on # PCIe Port #6 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 69 | subsystemid 0x174b 0x1007 |
| 70 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 71 | device pci 1c.6 off end # PCIe Port #7 |
| 72 | device pci 1c.7 off end # PCIe Port #8 |
| 73 | device pci 1d.0 on # USB2 EHCI #1 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 74 | subsystemid 0x174b 0x1007 |
| 75 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 76 | device pci 1e.0 off end # PCI bridge |
| 77 | device pci 1f.0 on # LPC bridge |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 78 | subsystemid 0x174b 0x1007 |
| 79 | chip superio/fintek/f71808a |
| 80 | register "multi_function_register_0" = "0x00" |
| 81 | register "multi_function_register_1" = "0xc4" |
| 82 | register "multi_function_register_2" = "0x21" |
| 83 | register "multi_function_register_3" = "0x2f" |
| 84 | register "multi_function_register_4" = "0x5c" |
| 85 | register "hwm_peci_tsi_ctrl" = "0x02" # PECI enabled, 1.23 V |
| 86 | register "hwm_tcc_temp" = "0x66" # TCC temperature = 102 °C |
| 87 | register "hwm_fan1_seg1_speed" = "0xff" # Fan 1 segment 1 = 100% |
| 88 | register "hwm_fan1_seg2_speed" = "0xdb" # Fan 1 segment 2 = 86% |
| 89 | register "hwm_fan1_seg3_speed" = "0xbc" # Fan 1 segment 3 = 74% |
| 90 | register "hwm_fan1_seg4_speed" = "0x9e" # Fan 1 segment 4 = 62% |
| 91 | register "hwm_fan1_seg5_speed" = "0x7f" # Fan 1 segment 5 = 50% |
| 92 | register "hwm_fan1_temp_src" = "0x18" # Fan 1 source = PECI |
| 93 | register "hwm_fan2_seg1_speed" = "0xff" # Fan 2 segment 1 = 100% |
| 94 | register "hwm_fan2_seg2_speed" = "0xdb" # Fan 2 segment 2 = 86% |
| 95 | register "hwm_fan2_seg3_speed" = "0xbc" # Fan 2 segment 3 = 74% |
| 96 | register "hwm_fan2_seg4_speed" = "0x9e" # Fan 2 segment 4 = 62% |
| 97 | register "hwm_fan2_seg5_speed" = "0x7f" # Fan 2 segment 5 = 50% |
| 98 | register "hwm_fan2_temp_src" = "0x1e" # Fan 2 source = temperature 2 |
| 99 | device pnp 4e.1 off end # Serial Port 1 |
| 100 | device pnp 4e.4 on # Hardware monitor |
| 101 | io 0x60 = 0x295 |
| 102 | irq 0x70 = 0 |
| 103 | end |
| 104 | device pnp 4e.5 off end # Keyboard |
| 105 | device pnp 4e.6 on # GPIO |
| 106 | irq 0xc5 = 0x1f |
| 107 | end |
| 108 | device pnp 4e.7 on # WDT |
| 109 | io 0x60 = 0xa00 |
| 110 | end |
| 111 | device pnp 4e.8 off end # CIR |
Nicola Corna | 5ad9396 | 2017-04-02 09:57:48 +0200 | [diff] [blame] | 112 | device pnp 4e.a on # PME, ACPI, EUP |
| 113 | irq 0xe0 = 0x90 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 114 | irq 0xf8 = 0x00 |
| 115 | irq 0xf9 = 0x09 |
| 116 | irq 0xfa = 0x00 |
| 117 | end |
| 118 | end |
| 119 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 120 | device pci 1f.2 on # SATA Controller 1 |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 121 | subsystemid 0x174b 0x1007 |
| 122 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 123 | device pci 1f.3 on # SMBus |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 124 | subsystemid 0x174b 0x1007 |
| 125 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 126 | device pci 1f.5 off end # SATA Controller 2 |
| 127 | device pci 1f.6 off end # Thermal |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 128 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 129 | device pci 00.0 on # Host bridge |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 130 | subsystemid 0x174b 0x1007 |
| 131 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 132 | device pci 01.0 on # PCIe Bridge for discrete graphics |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 133 | subsystemid 0x174b 0x1007 |
| 134 | end |
Angel Pons | d913036 | 2020-01-01 18:46:34 +0100 | [diff] [blame] | 135 | device pci 02.0 on # Internal graphics VGA controller |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 136 | subsystemid 0x8086 0x2010 |
| 137 | end |
| 138 | end |
| 139 | end |