mb/sapphire/pureplatinumh61: Use custom SPI OPMENU
The SPI chip in this board needs a custom OPMENU, otherwise flashrom
fails halfway during the write.
From the default OPMENU, Block Erase (0xd8) has been replaced by AAI
write (0xad) and Fast Read (0x0b) by Write Disable (0x04).
Signed-off-by: Nicola Corna <email@example.com>
Tested-by: build bot (Jenkins) <firstname.lastname@example.org>
Reviewed-by: Nico Huber <email@example.com>
1 file changed