Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Stefan Reinauer | 43b29cf | 2009-03-06 19:11:52 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007-2009 coresystems GmbH |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame] | 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <arch/io.h> |
| 22 | #include <stdint.h> |
| 23 | #include <device/device.h> |
| 24 | #include <device/pci.h> |
| 25 | #include <device/pci_ids.h> |
| 26 | #include <device/hypertransport.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <string.h> |
Stefan Reinauer | fd611f9 | 2013-02-27 23:45:20 +0100 | [diff] [blame] | 29 | #include <cbmem.h> |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 30 | #include <cpu/cpu.h> |
Stefan Reinauer | ab87254 | 2011-10-14 15:18:29 -0700 | [diff] [blame] | 31 | #include <arch/acpi.h> |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 32 | #include "i945.h" |
| 33 | |
Stefan Reinauer | de3206a | 2010-02-22 06:09:43 +0000 | [diff] [blame] | 34 | static int get_pcie_bar(u32 *base, u32 *len) |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 35 | { |
| 36 | device_t dev; |
| 37 | u32 pciexbar_reg; |
| 38 | |
| 39 | *base = 0; |
| 40 | *len = 0; |
| 41 | |
| 42 | dev = dev_find_slot(0, PCI_DEVFN(0, 0)); |
| 43 | if (!dev) |
| 44 | return 0; |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 45 | |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 46 | pciexbar_reg = pci_read_config32(dev, PCIEXBAR); |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 47 | |
| 48 | if (!(pciexbar_reg & (1 << 0))) |
| 49 | return 0; |
| 50 | |
| 51 | switch ((pciexbar_reg >> 1) & 3) { |
| 52 | case 0: // 256MB |
| 53 | *base = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)); |
| 54 | *len = 256 * 1024 * 1024; |
| 55 | return 1; |
| 56 | case 1: // 128M |
| 57 | *base = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)); |
| 58 | *len = 128 * 1024 * 1024; |
| 59 | return 1; |
| 60 | case 2: // 64M |
| 61 | *base = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26)); |
| 62 | *len = 64 * 1024 * 1024; |
| 63 | return 1; |
| 64 | } |
| 65 | |
| 66 | return 0; |
| 67 | } |
| 68 | |
Myles Watson | 25d1213 | 2010-09-13 13:14:48 +0000 | [diff] [blame] | 69 | static void add_fixed_resources(struct device *dev, int index) |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 70 | { |
Myles Watson | 25d1213 | 2010-09-13 13:14:48 +0000 | [diff] [blame] | 71 | struct resource *resource; |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 72 | u32 pcie_config_base, pcie_config_size; |
| 73 | |
Myles Watson | 25d1213 | 2010-09-13 13:14:48 +0000 | [diff] [blame] | 74 | if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) { |
| 75 | printk(BIOS_DEBUG, "Adding PCIe config bar\n"); |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 76 | resource = new_resource(dev, index++); |
Myles Watson | 25d1213 | 2010-09-13 13:14:48 +0000 | [diff] [blame] | 77 | resource->base = (resource_t) pcie_config_base; |
| 78 | resource->size = (resource_t) pcie_config_size; |
| 79 | resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | |
| 80 | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 81 | } |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 84 | static void pci_domain_set_resources(device_t dev) |
| 85 | { |
| 86 | uint32_t pci_tolm; |
| 87 | uint8_t tolud, reg8; |
| 88 | uint16_t reg16; |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 89 | unsigned long long tomk, tomk_stolen; |
Kyösti Mälkki | f7bfc34 | 2013-10-18 11:02:46 +0300 | [diff] [blame] | 90 | uint64_t uma_memory_base = 0, uma_memory_size = 0; |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 91 | uint64_t tseg_memory_base = 0, tseg_memory_size = 0; |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 92 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 93 | /* Can we find out how much memory we can use at most |
| 94 | * this way? |
| 95 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 96 | pci_tolm = find_pci_tolm(dev->link_list); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 97 | printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 98 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 99 | printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n", |
Paul Menzel | 355ce38 | 2014-05-30 13:58:59 +0200 | [diff] [blame^] | 100 | pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), BSM)); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 101 | |
| 102 | tolud = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9c); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 103 | printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08x\n", tolud << 24); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 104 | |
| 105 | tomk = tolud << 14; |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 106 | tomk_stolen = tomk; |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 107 | |
| 108 | /* Note: subtract IGD device and TSEG */ |
| 109 | reg8 = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9e); |
| 110 | if (reg8 & 1) { |
| 111 | int tseg_size = 0; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 112 | printk(BIOS_DEBUG, "TSEG decoded, subtracting "); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 113 | reg8 >>= 1; |
| 114 | reg8 &= 3; |
| 115 | switch (reg8) { |
| 116 | case 0: |
| 117 | tseg_size = 1024; |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 118 | break; /* TSEG = 1M */ |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 119 | case 1: |
| 120 | tseg_size = 2048; |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 121 | break; /* TSEG = 2M */ |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 122 | case 2: |
| 123 | tseg_size = 8192; |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 124 | break; /* TSEG = 8M */ |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 125 | } |
| 126 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 127 | printk(BIOS_DEBUG, "%dM\n", tseg_size >> 10); |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 128 | tomk_stolen -= tseg_size; |
| 129 | |
| 130 | /* For reserving TSEG memory in the memory map */ |
| 131 | tseg_memory_base = tomk_stolen * 1024ULL; |
| 132 | tseg_memory_size = tseg_size * 1024ULL; |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), GGC); |
| 136 | if (!(reg16 & 2)) { |
| 137 | int uma_size = 0; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 138 | printk(BIOS_DEBUG, "IGD decoded, subtracting "); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 139 | reg16 >>= 4; |
| 140 | reg16 &= 7; |
| 141 | switch (reg16) { |
| 142 | case 1: |
| 143 | uma_size = 1024; |
| 144 | break; |
| 145 | case 3: |
| 146 | uma_size = 8192; |
| 147 | break; |
| 148 | } |
| 149 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 150 | printk(BIOS_DEBUG, "%dM UMA\n", uma_size >> 10); |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 151 | tomk_stolen -= uma_size; |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 152 | |
| 153 | /* For reserving UMA memory in the memory map */ |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 154 | uma_memory_base = tomk_stolen * 1024ULL; |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 155 | uma_memory_size = uma_size * 1024ULL; |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 156 | } |
| 157 | |
| 158 | /* The following needs to be 2 lines, otherwise the second |
| 159 | * number is always 0 |
| 160 | */ |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 161 | printk(BIOS_INFO, "Available memory: %dK", (uint32_t)tomk_stolen); |
| 162 | printk(BIOS_INFO, " (%dM)\n", (uint32_t)(tomk_stolen >> 10)); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 163 | |
| 164 | /* Report the memory regions */ |
| 165 | ram_resource(dev, 3, 0, 640); |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 166 | ram_resource(dev, 4, 768, (tomk - 768)); |
Kyösti Mälkki | 6ff1d36 | 2012-07-27 08:42:20 +0300 | [diff] [blame] | 167 | uma_resource(dev, 5, uma_memory_base >> 10, uma_memory_size >> 10); |
| 168 | mmio_resource(dev, 6, tseg_memory_base >> 10, tseg_memory_size >> 10); |
| 169 | |
| 170 | add_fixed_resources(dev, 7); |
Myles Watson | 25d1213 | 2010-09-13 13:14:48 +0000 | [diff] [blame] | 171 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 172 | assign_resources(dev->link_list); |
Stefan Reinauer | 3c7f46b | 2009-02-27 23:09:55 +0000 | [diff] [blame] | 173 | |
Kyösti Mälkki | 42f4651 | 2013-06-27 08:20:09 +0300 | [diff] [blame] | 174 | set_top_of_ram(tomk_stolen * 1024); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 175 | } |
| 176 | |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 177 | /* TODO We could determine how many PCIe busses we need in |
| 178 | * the bar. For now that number is hardcoded to a max of 64. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 179 | * See e7525/northbridge.c for an example. |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 180 | */ |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 181 | static struct device_operations pci_domain_ops = { |
| 182 | .read_resources = pci_domain_read_resources, |
| 183 | .set_resources = pci_domain_set_resources, |
Myles Watson | 7eac445 | 2010-06-17 16:16:56 +0000 | [diff] [blame] | 184 | .enable_resources = NULL, |
| 185 | .init = NULL, |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 186 | .scan_bus = pci_domain_scan_bus, |
Kyösti Mälkki | 872c922 | 2013-07-03 09:44:28 +0300 | [diff] [blame] | 187 | .ops_pci_bus = pci_bus_default_ops, |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 188 | }; |
| 189 | |
| 190 | static void mc_read_resources(device_t dev) |
| 191 | { |
| 192 | struct resource *resource; |
| 193 | |
| 194 | pci_dev_read_resources(dev); |
| 195 | |
| 196 | /* So, this is one of the big mysteries in the coreboot resource |
| 197 | * allocator. This resource should make sure that the address space |
| 198 | * of the PCIe memory mapped config space bar. But it does not. |
| 199 | */ |
| 200 | |
| 201 | /* We use 0xcf as an unused index for our PCIe bar so that we find it again */ |
| 202 | resource = new_resource(dev, 0xcf); |
| 203 | resource->base = DEFAULT_PCIEXBAR; |
| 204 | resource->size = 64 * 1024 * 1024; /* 64MB hard coded PCIe config space */ |
| 205 | resource->flags = |
| 206 | IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | |
| 207 | IORESOURCE_ASSIGNED; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 208 | printk(BIOS_DEBUG, "Adding PCIe enhanced config space BAR 0x%08lx-0x%08lx.\n", |
Stefan Reinauer | 30140a5 | 2009-03-11 16:20:39 +0000 | [diff] [blame] | 209 | (unsigned long)(resource->base), (unsigned long)(resource->base + resource->size)); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | static void mc_set_resources(device_t dev) |
| 213 | { |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 214 | struct resource *resource; |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 215 | |
| 216 | /* Report the PCIe BAR */ |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 217 | resource = find_resource(dev, 0xcf); |
| 218 | if (resource) { |
| 219 | report_resource_stored(dev, resource, "<mmconfig>"); |
| 220 | } |
| 221 | |
| 222 | /* And call the normal set_resources */ |
| 223 | pci_dev_set_resources(dev); |
| 224 | } |
| 225 | |
| 226 | static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
| 227 | { |
Stefan Reinauer | 30140a5 | 2009-03-11 16:20:39 +0000 | [diff] [blame] | 228 | if (!vendor || !device) { |
| 229 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 230 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 231 | } else { |
| 232 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 233 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 234 | } |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 235 | } |
| 236 | |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 237 | #if CONFIG_HAVE_ACPI_RESUME |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 238 | static void northbridge_init(struct device *dev) |
| 239 | { |
| 240 | switch (pci_read_config32(dev, SKPAD)) { |
Sven Schnelle | d8c68a9 | 2011-06-15 09:26:34 +0200 | [diff] [blame] | 241 | case SKPAD_NORMAL_BOOT_MAGIC: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 242 | printk(BIOS_DEBUG, "Normal boot.\n"); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 243 | acpi_slp_type=0; |
| 244 | break; |
Sven Schnelle | d8c68a9 | 2011-06-15 09:26:34 +0200 | [diff] [blame] | 245 | case SKPAD_ACPI_S3_MAGIC: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 246 | printk(BIOS_DEBUG, "S3 Resume.\n"); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 247 | acpi_slp_type=3; |
| 248 | break; |
| 249 | default: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 250 | printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 251 | acpi_slp_type=0; |
| 252 | break; |
| 253 | } |
| 254 | } |
| 255 | #endif |
| 256 | |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 257 | static struct pci_operations intel_pci_ops = { |
| 258 | .set_subsystem = intel_set_subsystem, |
| 259 | }; |
| 260 | |
| 261 | static struct device_operations mc_ops = { |
| 262 | .read_resources = mc_read_resources, |
| 263 | .set_resources = mc_set_resources, |
| 264 | .enable_resources = pci_dev_enable_resources, |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 265 | #if CONFIG_HAVE_ACPI_RESUME |
| 266 | .init = northbridge_init, |
| 267 | #endif |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 268 | .scan_bus = 0, |
| 269 | .ops_pci = &intel_pci_ops, |
| 270 | }; |
| 271 | |
| 272 | static const struct pci_driver mc_driver __pci_driver = { |
| 273 | .ops = &mc_ops, |
| 274 | .vendor = PCI_VENDOR_ID_INTEL, |
Uwe Hermann | 5d7a1c8 | 2008-10-31 18:41:09 +0000 | [diff] [blame] | 275 | .device = 0x27a0, |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 276 | }; |
| 277 | |
| 278 | static void cpu_bus_init(device_t dev) |
| 279 | { |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 280 | initialize_cpus(dev->link_list); |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 281 | } |
| 282 | |
| 283 | static void cpu_bus_noop(device_t dev) |
| 284 | { |
| 285 | } |
| 286 | |
| 287 | static struct device_operations cpu_bus_ops = { |
| 288 | .read_resources = cpu_bus_noop, |
| 289 | .set_resources = cpu_bus_noop, |
| 290 | .enable_resources = cpu_bus_noop, |
| 291 | .init = cpu_bus_init, |
| 292 | .scan_bus = 0, |
| 293 | }; |
| 294 | |
| 295 | static void enable_dev(device_t dev) |
| 296 | { |
| 297 | /* Set the operations if it is a special bus type */ |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 298 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 299 | dev->ops = &pci_domain_ops; |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 300 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
Stefan Reinauer | 278534d | 2008-10-29 04:51:07 +0000 | [diff] [blame] | 301 | dev->ops = &cpu_bus_ops; |
| 302 | } |
| 303 | } |
| 304 | |
| 305 | struct chip_operations northbridge_intel_i945_ops = { |
| 306 | CHIP_NAME("Intel i945 Northbridge") |
| 307 | .enable_dev = enable_dev, |
| 308 | }; |