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Mario Scheithauer58bf3e72018-10-30 09:57:44 +01001chip soc/intel/apollolake
2
Mario Scheithauer58bf3e72018-10-30 09:57:44 +01003 register "sci_irq" = "SCIS_IRQ10"
4
Mario Scheithauer58bf3e72018-10-30 09:57:44 +01005 # EMMC TX DATA Delay 1
6 # Refer to EDS-Vol2-22.3.
7 # [14:8] steps of delay for HS400, each 125ps.
8 # [6:0] steps of delay for SDR104/HS200, each 125ps.
9 register "emmc_tx_data_cntl1" = "0x0C16"
10
11 # EMMC TX DATA Delay 2
12 # Refer to EDS-Vol2-22.3.
13 # [30:24] steps of delay for SDR50, each 125ps.
14 # [22:16] steps of delay for DDR50, each 125ps.
15 # [14:8] steps of delay for SDR25/HS50, each 125ps.
16 # [6:0] steps of delay for SDR12, each 125ps.
17 register "emmc_tx_data_cntl2" = "0x28162828"
18
19 # EMMC RX CMD/DATA Delay 1
20 # Refer to EDS-Vol2-22.3.
21 # [30:24] steps of delay for SDR50, each 125ps.
22 # [22:16] steps of delay for DDR50, each 125ps.
23 # [14:8] steps of delay for SDR25/HS50, each 125ps.
24 # [6:0] steps of delay for SDR12, each 125ps.
25 register "emmc_rx_cmd_data_cntl1" = "0x00181717"
26
27 # EMMC RX CMD/DATA Delay 2
28 # Refer to EDS-Vol2-22.3.
29 # [17:16] stands for Rx Clock before Output Buffer
30 # [14:8] steps of delay for Auto Tuning Mode, each 125ps.
31 # [6:0] steps of delay for HS200, each 125ps.
32 register "emmc_rx_cmd_data_cntl2" = "0x10008"
33
34 # 0:HS400(Default), 1:HS200, 2:DDR50
Mario Scheithauer1f21a962019-07-10 13:15:54 +020035 register "emmc_host_max_speed" = "1"
Mario Scheithauer58bf3e72018-10-30 09:57:44 +010036
Werner Zeh45f44942021-04-27 11:40:17 +020037 # I2C0 controller used for RTC
38 register "common_soc_config" = "{
39 .i2c[0] = {
40 .speed = I2C_SPEED_STANDARD,
41 .rise_time_ns = 40,
42 .fall_time_ns = 10,
Werner Zeha67bda32021-05-31 07:15:36 +020043 .data_hold_time_ns = 300,
44 .speed_config[0] = {
45 .speed = I2C_SPEED_FAST,
46 .scl_hcnt = 0x68,
47 .scl_lcnt = 0xd1,
48 .sda_hold = 0x28
49 },
Werner Zeh45f44942021-04-27 11:40:17 +020050 },
51 }"
52
Mario Scheithauer58bf3e72018-10-30 09:57:44 +010053 device domain 0 on
54 device pci 00.0 on end # - Host Bridge
55 device pci 00.1 off end # - DPTF
56 device pci 00.2 off end # - NPK
57 device pci 02.0 on end # - Gen - Display
58 device pci 03.0 off end # - Iunit
59 device pci 0d.0 on end # - P2SB
60 device pci 0d.1 off end # - PMC
61 device pci 0d.2 on end # - SPI
62 device pci 0d.3 off end # - Shared SRAM
Werner Zeha4e52362019-04-12 09:10:27 +020063 device pci 0e.0 on end # - Audio
Subrata Banike9b93732020-09-17 15:48:54 +053064 device pci 0f.0 on end # - CSE
Mario Scheithauer58bf3e72018-10-30 09:57:44 +010065 device pci 11.0 on end # - ISH
Mario Scheithauerf0232702022-01-26 11:53:00 +010066 device pci 12.0 on # - SATA
Sean Rhodes57779952022-05-19 15:35:31 +010067 register "SataPortsEnable[0]" = "1"
68 register "SataPortsEnable[1]" = "1"
Mario Scheithauerf0232702022-01-26 11:53:00 +010069 register "DisableSataSalpSupport" = "1"
70 end
Mario Scheithauer92e4ed12021-01-14 14:54:38 +010071 device pci 13.0 on # - RP 2 - PCIe A 0
72 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
73 register "pcie_rp_hotplug_enable[2]" = "0"
74 end
75 device pci 13.1 on # - RP 3 - PCIe A 1
76 register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
77 register "pcie_rp_hotplug_enable[3]" = "0"
78 end
79 device pci 13.2 on # - RP 4 - PCIe-A 2
80 register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
81 register "pcie_rp_hotplug_enable[4]" = "0"
82 end
83 device pci 13.3 on # - RP 5 - PCIe-A 3
84 register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
85 register "pcie_rp_hotplug_enable[5]" = "0"
86 end
87 device pci 14.0 on # - RP 0 - PCIe-B 0
88 register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED"
89 register "pcie_rp_hotplug_enable[0]" = "0"
90 end
91 device pci 14.1 on # - RP 1 - PCIe-B 1
92 register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
93 register "pcie_rp_hotplug_enable[1]" = "0"
94 end
Mario Scheithauer58bf3e72018-10-30 09:57:44 +010095 device pci 15.0 on end # - XHCI
96 device pci 15.1 off end # - XDCI
97 device pci 16.0 on # - I2C 0
98 # Enable external RTC chip
99 chip drivers/i2c/rx6110sa
100 register "pmon_sampling" = "PMON_SAMPL_256_MS"
101 register "bks_on" = "0"
102 register "bks_off" = "1"
103 register "iocut_en" = "1"
104 register "set_user_date" = "1"
105 register "user_year" = "04"
106 register "user_month" = "07"
107 register "user_day" = "01"
108 register "user_weekday" = "4"
109 device i2c 0x32 on end # RTC RX6110 SA
110 end
111 end
112 device pci 16.1 off end # - I2C 1
113 device pci 16.2 off end # - I2C 2
114 device pci 16.3 off end # - I2C 3
115 device pci 17.0 off end # - I2C 4
116 device pci 17.1 off end # - I2C 5
117 device pci 17.2 off end # - I2C 6
Mario Scheithauerc7766092018-11-06 12:35:26 +0100118 device pci 17.3 off end # - I2C 7
Mario Scheithauer58bf3e72018-10-30 09:57:44 +0100119 device pci 18.0 on end # - UART 0
120 device pci 18.1 on end # - UART 1
121 device pci 18.2 on end # - UART 2
122 device pci 18.3 on end # - UART 3
123 device pci 19.0 off end # - SPI 0
124 device pci 19.1 off end # - SPI 1
125 device pci 19.2 off end # - SPI 2
126 device pci 1a.0 off end # - PWM
127 device pci 1b.0 off end # - SDCARD
128 device pci 1c.0 on end # - eMMC
129 device pci 1d.0 off end # - UFS
130 device pci 1e.0 off end # - SDIO
131 device pci 1f.0 on end # - LPC
132 device pci 1f.1 on end # - SMBUS
133 end
134end