zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * PCIe late post initialization. |
| 6 | * |
| 7 | * |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: GNB |
| 12 | * @e \$Revision: 64152 $ @e \$Date: 2012-01-16 21:38:07 -0600 (Mon, 16 Jan 2012) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame^] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
| 31 | * |
| 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | * *************************************************************************** |
| 43 | * |
| 44 | */ |
| 45 | /*---------------------------------------------------------------------------------------- |
| 46 | * M O D U L E S U S E D |
| 47 | *---------------------------------------------------------------------------------------- |
| 48 | */ |
| 49 | #include "AGESA.h" |
| 50 | #include "Ids.h" |
| 51 | #include "Gnb.h" |
| 52 | #include "GnbGfx.h" |
| 53 | #include "GnbCommonLib.h" |
| 54 | #include "GnbTable.h" |
| 55 | #include "GnbPcieConfig.h" |
| 56 | #include "GnbRegisterAccTN.h" |
| 57 | #include "cpuFamilyTranslation.h" |
| 58 | #include "GnbRegistersTN.h" |
| 59 | #include "GfxLibTN.h" |
| 60 | #include "GfxGmcInitTN.h" |
| 61 | #include "Filecode.h" |
| 62 | #define FILECODE PROC_GNB_MODULES_GNBINITTN_GFXGMCINITTN_FILECODE |
| 63 | /*---------------------------------------------------------------------------------------- |
| 64 | * D E F I N I T I O N S A N D M A C R O S |
| 65 | *---------------------------------------------------------------------------------------- |
| 66 | */ |
| 67 | |
| 68 | extern GNB_TABLE ROMDATA GfxGmcColockGatingDisableTN []; |
| 69 | extern GNB_TABLE ROMDATA GfxGmcInitTableTN []; |
| 70 | extern GNB_TABLE ROMDATA GfxGmcColockGatingEnableTN []; |
| 71 | |
| 72 | |
| 73 | #define GNB_GFX_DRAM_CH_0_PRESENT 1 |
| 74 | #define GNB_GFX_DRAM_CH_1_PRESENT 2 |
| 75 | |
| 76 | /*---------------------------------------------------------------------------------------- |
| 77 | * T Y P E D E F S A N D S T R U C T U R E S |
| 78 | *---------------------------------------------------------------------------------------- |
| 79 | */ |
| 80 | |
| 81 | DCT_REGISTER_ENTRY DctRegisterTable [] = { |
| 82 | { |
| 83 | TYPE_D18F2_dct0, |
| 84 | D18F2x94_dct0_ADDRESS, |
| 85 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x94_dct0) |
| 86 | }, |
| 87 | { |
| 88 | TYPE_D18F2_dct1, |
| 89 | D18F2x94_dct1_ADDRESS, |
| 90 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x94_dct1) |
| 91 | }, |
| 92 | { |
| 93 | TYPE_D18F2_dct0, |
| 94 | D18F2x2E0_dct0_ADDRESS, |
| 95 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x2E0_dct0) |
| 96 | }, |
| 97 | { |
| 98 | TYPE_D18F2_dct1, |
| 99 | D18F2x2E0_dct1_ADDRESS, |
| 100 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x2E0_dct1) |
| 101 | }, |
| 102 | { |
| 103 | TYPE_D18F2_dct0_mp0, |
| 104 | D18F2x200_dct0_mp0_ADDRESS, |
| 105 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x200_dct0_mp0) |
| 106 | }, |
| 107 | { |
| 108 | TYPE_D18F2_dct0_mp1, |
| 109 | D18F2x200_dct0_mp1_ADDRESS, |
| 110 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x200_dct0_mp1) |
| 111 | }, |
| 112 | { |
| 113 | TYPE_D18F2_dct1_mp0, |
| 114 | D18F2x200_dct1_mp0_ADDRESS, |
| 115 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x200_dct1_mp0) |
| 116 | }, |
| 117 | { |
| 118 | TYPE_D18F2_dct1_mp1, |
| 119 | D18F2x200_dct1_mp1_ADDRESS, |
| 120 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x200_dct1_mp1) |
| 121 | }, |
| 122 | { |
| 123 | TYPE_D18F2_dct0_mp0, |
| 124 | D18F2x204_dct0_mp0_ADDRESS, |
| 125 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x204_dct0_mp0) |
| 126 | }, |
| 127 | { |
| 128 | TYPE_D18F2_dct0_mp1, |
| 129 | D18F2x204_dct0_mp1_ADDRESS, |
| 130 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x204_dct0_mp1) |
| 131 | }, |
| 132 | { |
| 133 | TYPE_D18F2_dct1_mp0, |
| 134 | D18F2x204_dct1_mp0_ADDRESS, |
| 135 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x204_dct1_mp0) |
| 136 | }, |
| 137 | { |
| 138 | TYPE_D18F2_dct1_mp1, |
| 139 | D18F2x204_dct1_mp1_ADDRESS, |
| 140 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x204_dct1_mp1) |
| 141 | }, |
| 142 | { |
| 143 | TYPE_D18F2_dct0_mp0, |
| 144 | D18F2x22C_dct0_mp0_ADDRESS, |
| 145 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x22C_dct0_mp0) |
| 146 | }, |
| 147 | { |
| 148 | TYPE_D18F2_dct0_mp1, |
| 149 | D18F2x22C_dct0_mp1_ADDRESS, |
| 150 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x22C_dct0_mp1) |
| 151 | }, |
| 152 | { |
| 153 | TYPE_D18F2_dct1_mp0, |
| 154 | D18F2x22C_dct1_mp0_ADDRESS, |
| 155 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x22C_dct1_mp0) |
| 156 | }, |
| 157 | { |
| 158 | TYPE_D18F2_dct1_mp1, |
| 159 | D18F2x22C_dct1_mp1_ADDRESS, |
| 160 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x22C_dct1_mp1) |
| 161 | }, |
| 162 | { |
| 163 | TYPE_D18F2_dct0_mp0, |
| 164 | D18F2x21C_dct0_mp0_ADDRESS, |
| 165 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x21C_dct0_mp0) |
| 166 | }, |
| 167 | { |
| 168 | TYPE_D18F2_dct0_mp1, |
| 169 | D18F2x21C_dct0_mp1_ADDRESS, |
| 170 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x21C_dct0_mp1) |
| 171 | }, |
| 172 | { |
| 173 | TYPE_D18F2_dct1_mp0, |
| 174 | D18F2x21C_dct1_mp0_ADDRESS, |
| 175 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x21C_dct1_mp0) |
| 176 | }, |
| 177 | { |
| 178 | TYPE_D18F2_dct1_mp1, |
| 179 | D18F2x21C_dct1_mp1_ADDRESS, |
| 180 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x21C_dct1_mp1) |
| 181 | }, |
| 182 | { |
| 183 | TYPE_D18F2_dct0_mp0, |
| 184 | D18F2x20C_dct0_mp0_ADDRESS, |
| 185 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x20C_dct0_mp0) |
| 186 | }, |
| 187 | { |
| 188 | TYPE_D18F2_dct0_mp1, |
| 189 | D18F2x20C_dct0_mp1_ADDRESS, |
| 190 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x20C_dct0_mp1) |
| 191 | }, |
| 192 | { |
| 193 | TYPE_D18F2_dct1_mp0, |
| 194 | D18F2x20C_dct1_mp0_ADDRESS, |
| 195 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x20C_dct1_mp0) |
| 196 | }, |
| 197 | { |
| 198 | TYPE_D18F2_dct1_mp1, |
| 199 | D18F2x20C_dct1_mp1_ADDRESS, |
| 200 | (UINT16) offsetof (DCT_CHANNEL_INFO, D18F2x20C_dct1_mp1) |
| 201 | } |
| 202 | }; |
| 203 | |
| 204 | /*---------------------------------------------------------------------------------------- |
| 205 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 206 | *---------------------------------------------------------------------------------------- |
| 207 | */ |
| 208 | |
| 209 | /*----------------------------------------------------------------------------------------*/ |
| 210 | /** |
| 211 | * Initialize Fb location |
| 212 | * |
| 213 | * |
| 214 | * |
| 215 | * @param[in] Gfx Pointer to global GFX configuration |
| 216 | * |
| 217 | */ |
| 218 | STATIC VOID |
| 219 | GfxGmcInitializeFbLocationTN ( |
| 220 | IN GFX_PLATFORM_CONFIG *Gfx |
| 221 | ) |
| 222 | { |
| 223 | GMMx2024_STRUCT GMMx2024; |
| 224 | GMMx2068_STRUCT GMMx2068; |
| 225 | GMMx2C04_STRUCT GMMx2C04; |
| 226 | GMMx5428_STRUCT GMMx5428; |
| 227 | UINT64 FBBase; |
| 228 | UINT64 FBTop; |
| 229 | FBBase = 0x0F00000000; |
| 230 | FBTop = FBBase + Gfx->UmaInfo.UmaSize - 1; |
| 231 | GMMx2024.Value = 0; |
| 232 | GMMx2C04.Value = 0; |
| 233 | GMMx2024.Field.FB_BASE = (UINT16) (FBBase >> 24); |
| 234 | GMMx2024.Field.FB_TOP = (UINT16) (FBTop >> 24); |
| 235 | GMMx2068.Field.FB_OFFSET = (UINT32) (Gfx->UmaInfo.UmaBase >> 22); |
| 236 | GMMx2C04.Field.NONSURF_BASE = (UINT32) (FBBase >> 8); |
| 237 | GMMx5428.Field.CONFIG_MEMSIZE = Gfx->UmaInfo.UmaSize >> 20; |
| 238 | GnbRegisterWriteTN (GMMx2024_TYPE, GMMx2024_ADDRESS, &GMMx2024.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 239 | GnbRegisterWriteTN (GMMx2068_TYPE, GMMx2068_ADDRESS, &GMMx2068.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 240 | GnbRegisterWriteTN (GMMx2C04_TYPE, GMMx2C04_ADDRESS, &GMMx2C04.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 241 | GnbRegisterWriteTN (GMMx5428_TYPE, GMMx5428_ADDRESS, &GMMx5428.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 242 | } |
| 243 | |
| 244 | /*----------------------------------------------------------------------------------------*/ |
| 245 | /** |
| 246 | * Get Sequencer model info |
| 247 | * |
| 248 | * |
| 249 | * @param[out] DctChannelInfo Various DCT/GMM info |
| 250 | * @param[in] Gfx Pointer to global GFX configuration |
| 251 | */ |
| 252 | |
| 253 | STATIC VOID |
| 254 | GfxGmcDctMemoryChannelInfoTN ( |
| 255 | OUT DCT_CHANNEL_INFO *DctChannelInfo, |
| 256 | IN GFX_PLATFORM_CONFIG *Gfx |
| 257 | ) |
| 258 | { |
| 259 | |
| 260 | UINT32 Index; |
| 261 | UINT32 Value; |
| 262 | |
| 263 | for (Index = 0; Index < (sizeof (DctRegisterTable) / sizeof (DCT_REGISTER_ENTRY)); Index++) { |
| 264 | GnbRegisterReadTN ( |
| 265 | DctRegisterTable[Index].RegisterSpaceType, |
| 266 | DctRegisterTable[Index].Address, |
| 267 | &Value, |
| 268 | 0, |
| 269 | GnbLibGetHeader (Gfx) |
| 270 | ); |
| 271 | *(UINT32 *)((UINT8 *) DctChannelInfo + DctRegisterTable[Index].DctChannelInfoTableOffset) = Value; |
| 272 | } |
| 273 | } |
| 274 | |
| 275 | /*----------------------------------------------------------------------------------------*/ |
| 276 | /** |
| 277 | * Initialize sequencer model |
| 278 | * |
| 279 | * |
| 280 | * |
| 281 | * @param[in] Gfx Pointer to global GFX configuration |
| 282 | * |
| 283 | */ |
| 284 | STATIC VOID |
| 285 | GfxGmcInitializeSequencerTN ( |
| 286 | IN GFX_PLATFORM_CONFIG *Gfx |
| 287 | ) |
| 288 | { |
| 289 | |
| 290 | UINT32 memps0_freq; |
| 291 | UINT32 memps1_freq; |
| 292 | UINT32 scale_mp0; |
| 293 | UINT32 scale_mp1; |
| 294 | UINT8 DramChannelPresent; |
| 295 | ex1047_STRUCT ex1047 ; |
| 296 | ex1048_STRUCT ex1048 ; |
| 297 | ex1060_STRUCT ex1060 ; |
| 298 | ex1061_STRUCT ex1061 ; |
| 299 | ex1062_STRUCT ex1062 ; |
| 300 | DCT_CHANNEL_INFO DctChannel; |
| 301 | D18F5x170_STRUCT D18F5x170; |
| 302 | ex1012_STRUCT ex1012 ; |
| 303 | ex1034_STRUCT ex1034 ; |
| 304 | |
| 305 | GfxGmcDctMemoryChannelInfoTN (&DctChannel, Gfx); |
| 306 | |
| 307 | DramChannelPresent = 0; |
| 308 | if (!DctChannel.D18F2x94_dct1.Field.DisDramInterface) { |
| 309 | DramChannelPresent |= GNB_GFX_DRAM_CH_1_PRESENT; |
| 310 | } |
| 311 | |
| 312 | if (!DctChannel.D18F2x94_dct0.Field.DisDramInterface) { |
| 313 | //if (channel 0 present) |
| 314 | //memps0_freq = extract frequency from DRAM Configuration High <D18F2x094_dct[0]>[4:0] encoding |
| 315 | //memps1_freq = extract frequency from Memory P-state Control Status <D18F2x2E0_dct[0]>[28:24] encoding |
| 316 | DramChannelPresent |= GNB_GFX_DRAM_CH_0_PRESENT; |
| 317 | memps0_freq = GfxLibExtractDramFrequency ((UINT8) DctChannel.D18F2x94_dct0.Field.MemClkFreq, GnbLibGetHeader (Gfx)); |
| 318 | memps1_freq = GfxLibExtractDramFrequency ((UINT8) DctChannel.D18F2x2E0_dct0.Field.M1MemClkFreq, GnbLibGetHeader (Gfx)); |
| 319 | } else { |
| 320 | //memps0_freq = extract frequency from DRAM Configuration High <D18F2x094_dct[1]>[4:0] encoding |
| 321 | //memps1_freq = extract frequency from Memory P-state Control Status <D18F2x2E0_dct[1]>[28:24] encoding |
| 322 | memps0_freq = GfxLibExtractDramFrequency ((UINT8) DctChannel.D18F2x94_dct1.Field.MemClkFreq, GnbLibGetHeader (Gfx)); |
| 323 | memps1_freq = GfxLibExtractDramFrequency ((UINT8) DctChannel.D18F2x2E0_dct1.Field.M1MemClkFreq, GnbLibGetHeader (Gfx)); |
| 324 | } |
| 325 | |
| 326 | GnbRegisterReadTN (D18F5x170_TYPE, D18F5x170_ADDRESS, &D18F5x170.Value, 0, GnbLibGetHeader (Gfx)); |
| 327 | if (D18F5x170.Field.MemPstateDis == 1) { |
| 328 | memps1_freq = memps0_freq; |
| 329 | } |
| 330 | |
| 331 | //scale_mp0 = sclk_max_freq / memps0_freq |
| 332 | //scale_mp1 = sclk_max_freq / memps1_freq |
| 333 | //Multiply it by 100 to avoid dealing with floating point values |
| 334 | scale_mp0 = (GfxLibGetMaxSclk (GnbLibGetHeader (Gfx)) * 100) / memps0_freq; |
| 335 | scale_mp1 = (GfxLibGetMaxSclk (GnbLibGetHeader (Gfx)) * 100) / memps1_freq; |
| 336 | |
| 337 | GnbRegisterReadTN (TYPE_GMM , 0x2774 , &ex1047.Value, 0, GnbLibGetHeader (Gfx)); |
| 338 | GnbRegisterReadTN (TYPE_GMM , 0x2778 , &ex1048.Value, 0, GnbLibGetHeader (Gfx)); |
| 339 | GnbRegisterReadTN (TYPE_GMM , 0x27f0 , &ex1060.Value, 0, GnbLibGetHeader (Gfx)); |
| 340 | GnbRegisterReadTN (TYPE_GMM , 0x27fc , &ex1061.Value, 0, GnbLibGetHeader (Gfx)); |
| 341 | |
| 342 | if (((DramChannelPresent & GNB_GFX_DRAM_CH_0_PRESENT) != 0) && ((DramChannelPresent & GNB_GFX_DRAM_CH_1_PRESENT) != 0)) { |
| 343 | ex1047.Field.ex1047_0 = (MIN (DctChannel.D18F2x200_dct0_mp0.Field.Trcd, DctChannel.D18F2x200_dct1_mp0.Field.Trcd) * scale_mp0) / 100; |
| 344 | ex1047.Field.ex1047_1 = ex1047.Field.ex1047_0; |
| 345 | ex1047.Field.ex1047_2 = (MIN ((DctChannel.D18F2x204_dct0_mp0.Field.Trc - DctChannel.D18F2x200_dct0_mp0.Field.Trcd), |
| 346 | (DctChannel.D18F2x204_dct1_mp0.Field.Trc - DctChannel.D18F2x200_dct1_mp0.Field.Trcd)) * scale_mp0) / 100; |
| 347 | ex1047.Field.ex1047_3 = ex1047.Field.ex1047_2; |
| 348 | |
| 349 | ex1048.Field.ex1048_0 = (MIN (DctChannel.D18F2x204_dct0_mp0.Field.Trc, DctChannel.D18F2x204_dct1_mp0.Field.Trc) * scale_mp0) / 100; |
| 350 | ex1048.Field.ex1048_1 = (MIN (DctChannel.D18F2x200_dct0_mp0.Field.Trp, DctChannel.D18F2x200_dct1_mp0.Field.Trp) * scale_mp0) / 100; |
| 351 | ex1048.Field.ex1048_2 = (MIN ((DctChannel.D18F2x22C_dct0_mp0.Field.Twr + DctChannel.D18F2x200_dct0_mp0.Field.Trp), |
| 352 | (DctChannel.D18F2x22C_dct1_mp0.Field.Twr + DctChannel.D18F2x200_dct1_mp0.Field.Trp)) * scale_mp0) / 100; |
| 353 | ex1048.Field.ex1048_3 = ((MIN ((DctChannel.D18F2x20C_dct0_mp0.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct0_mp0.Field.Twtr + DctChannel.D18F2x21C_dct0_mp0.Field.TrwtTO), |
| 354 | (DctChannel.D18F2x20C_dct1_mp0.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct1_mp0.Field.Twtr + DctChannel.D18F2x21C_dct1_mp0.Field.TrwtTO)) / 2) * scale_mp0) / 100; |
| 355 | |
| 356 | ex1060.Field.ex1060_0 = (MIN (DctChannel.D18F2x200_dct0_mp1.Field.Trcd, DctChannel.D18F2x200_dct1_mp1.Field.Trcd) * scale_mp1) / 100; |
| 357 | ex1060.Field.ex1060_1 = ex1060.Field.ex1060_0; |
| 358 | ex1060.Field.ex1060_2 = (MIN ((DctChannel.D18F2x204_dct0_mp1.Field.Trc - DctChannel.D18F2x200_dct0_mp1.Field.Trcd), |
| 359 | (DctChannel.D18F2x204_dct1_mp1.Field.Trc - DctChannel.D18F2x200_dct1_mp1.Field.Trcd)) * scale_mp1) / 100; |
| 360 | ex1060.Field.ex1060_3 = ex1060.Field.ex1060_2; |
| 361 | |
| 362 | ex1061.Field.ex1061_0 = (MIN (DctChannel.D18F2x204_dct0_mp1.Field.Trc, DctChannel.D18F2x204_dct1_mp1.Field.Trc) * scale_mp1) / 100; |
| 363 | ex1061.Field.ex1061_1 = (MIN (DctChannel.D18F2x200_dct0_mp1.Field.Trp, DctChannel.D18F2x200_dct1_mp1.Field.Trp) * scale_mp1) / 100; |
| 364 | ex1061.Field.ex1061_2 = (MIN ((DctChannel.D18F2x22C_dct0_mp1.Field.Twr + DctChannel.D18F2x200_dct0_mp1.Field.Trp), |
| 365 | (DctChannel.D18F2x22C_dct1_mp1.Field.Twr + DctChannel.D18F2x200_dct1_mp1.Field.Trp)) * scale_mp1) / 100; |
| 366 | ex1061.Field.ex1061_3 = ((MIN ((DctChannel.D18F2x20C_dct0_mp1.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct0_mp1.Field.Twtr + DctChannel.D18F2x21C_dct0_mp1.Field.TrwtTO), |
| 367 | (DctChannel.D18F2x20C_dct1_mp1.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct1_mp1.Field.Twtr + DctChannel.D18F2x21C_dct1_mp1.Field.TrwtTO)) / 2) * scale_mp1) / 100; |
| 368 | |
| 369 | } else if ((DramChannelPresent & GNB_GFX_DRAM_CH_0_PRESENT) != 0) { |
| 370 | ex1047.Field.ex1047_0 = (DctChannel.D18F2x200_dct0_mp0.Field.Trcd * scale_mp0) / 100; |
| 371 | ex1047.Field.ex1047_1 = ex1047.Field.ex1047_0; |
| 372 | ex1047.Field.ex1047_2 = ((DctChannel.D18F2x204_dct0_mp0.Field.Trc - DctChannel.D18F2x200_dct0_mp0.Field.Trcd) * scale_mp0) / 100; |
| 373 | ex1047.Field.ex1047_3 = ex1047.Field.ex1047_2; |
| 374 | |
| 375 | ex1048.Field.ex1048_0 = (DctChannel.D18F2x204_dct0_mp0.Field.Trc * scale_mp0) / 100; |
| 376 | ex1048.Field.ex1048_1 = (DctChannel.D18F2x200_dct0_mp0.Field.Trp * scale_mp0) / 100; |
| 377 | ex1048.Field.ex1048_2 = ((DctChannel.D18F2x22C_dct0_mp0.Field.Twr + DctChannel.D18F2x200_dct0_mp0.Field.Trp) * scale_mp0) / 100; |
| 378 | ex1048.Field.ex1048_3 = (((DctChannel.D18F2x20C_dct0_mp0.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct0_mp0.Field.Twtr + DctChannel.D18F2x21C_dct0_mp0.Field.TrwtTO) / 2) * scale_mp0) / 100; |
| 379 | |
| 380 | ex1060.Field.ex1060_0 = (DctChannel.D18F2x200_dct0_mp1.Field.Trcd * scale_mp1) / 100; |
| 381 | ex1060.Field.ex1060_1 = ex1060.Field.ex1060_0; |
| 382 | ex1060.Field.ex1060_2 = ((DctChannel.D18F2x204_dct0_mp1.Field.Trc - DctChannel.D18F2x200_dct0_mp1.Field.Trcd) * scale_mp1) / 100; |
| 383 | ex1060.Field.ex1060_3 = ex1060.Field.ex1060_2; |
| 384 | |
| 385 | ex1061.Field.ex1061_0 = (DctChannel.D18F2x204_dct0_mp1.Field.Trc * scale_mp1) / 100; |
| 386 | ex1061.Field.ex1061_1 = (DctChannel.D18F2x200_dct0_mp1.Field.Trp * scale_mp1) / 100; |
| 387 | ex1061.Field.ex1061_2 = ((DctChannel.D18F2x22C_dct0_mp1.Field.Twr + DctChannel.D18F2x200_dct0_mp1.Field.Trp) * scale_mp1) / 100; |
| 388 | ex1061.Field.ex1061_3 = (((DctChannel.D18F2x20C_dct0_mp1.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct0_mp1.Field.Twtr + DctChannel.D18F2x21C_dct0_mp1.Field.TrwtTO) / 2) * scale_mp1) / 100; |
| 389 | |
| 390 | } else { |
| 391 | ex1047.Field.ex1047_0 = (DctChannel.D18F2x200_dct1_mp0.Field.Trcd * scale_mp0) / 100; |
| 392 | ex1047.Field.ex1047_1 = ex1047.Field.ex1047_0; |
| 393 | ex1047.Field.ex1047_2 = ((DctChannel.D18F2x204_dct1_mp0.Field.Trc - DctChannel.D18F2x200_dct1_mp0.Field.Trcd) * scale_mp0) / 100; |
| 394 | ex1047.Field.ex1047_3 = ex1047.Field.ex1047_2; |
| 395 | |
| 396 | ex1048.Field.ex1048_0 = (DctChannel.D18F2x204_dct1_mp0.Field.Trc * scale_mp0) / 100; |
| 397 | ex1048.Field.ex1048_1 = (DctChannel.D18F2x200_dct1_mp0.Field.Trp * scale_mp0) / 100; |
| 398 | ex1048.Field.ex1048_2 = ((DctChannel.D18F2x22C_dct1_mp0.Field.Twr + DctChannel.D18F2x200_dct1_mp0.Field.Trp) * scale_mp0) / 100; |
| 399 | ex1048.Field.ex1048_3 = (((DctChannel.D18F2x20C_dct1_mp0.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct1_mp0.Field.Twtr + DctChannel.D18F2x21C_dct1_mp0.Field.TrwtTO) / 2) * scale_mp0) / 100; |
| 400 | |
| 401 | ex1060.Field.ex1060_0 = (DctChannel.D18F2x200_dct1_mp1.Field.Trcd * scale_mp1) / 100; |
| 402 | ex1060.Field.ex1060_1 = ex1060.Field.ex1060_0; |
| 403 | ex1060.Field.ex1060_2 = ((DctChannel.D18F2x204_dct1_mp1.Field.Trc - DctChannel.D18F2x200_dct1_mp1.Field.Trcd) * scale_mp1) / 100; |
| 404 | ex1060.Field.ex1060_3 = ex1060.Field.ex1060_2; |
| 405 | |
| 406 | ex1061.Field.ex1061_0 = (DctChannel.D18F2x204_dct1_mp1.Field.Trc * scale_mp1) / 100; |
| 407 | ex1061.Field.ex1061_1 = (DctChannel.D18F2x200_dct1_mp1.Field.Trp * scale_mp1) / 100; |
| 408 | ex1061.Field.ex1061_2 = ((DctChannel.D18F2x22C_dct1_mp1.Field.Twr + DctChannel.D18F2x200_dct1_mp1.Field.Trp) * scale_mp1) / 100; |
| 409 | ex1061.Field.ex1061_3 = (((DctChannel.D18F2x20C_dct1_mp1.Field.Tcwl + 4 + DctChannel.D18F2x20C_dct1_mp1.Field.Twtr + DctChannel.D18F2x21C_dct1_mp1.Field.TrwtTO) / 2) * scale_mp1) / 100; |
| 410 | } |
| 411 | |
| 412 | GnbRegisterWriteTN (TYPE_GMM , 0x2774 , &ex1047.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 413 | GnbRegisterWriteTN (TYPE_GMM , 0x2778 , &ex1048.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 414 | GnbRegisterWriteTN (TYPE_GMM , 0x27f0 , &ex1060.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 415 | GnbRegisterWriteTN (TYPE_GMM , 0x27fc , &ex1061.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 416 | ex1062.Field.ex1062_0 = GfxLibGetNumberOfSclkPerDramBurst (scale_mp0, GnbLibGetHeader (Gfx)); |
| 417 | ex1062.Field.ex1062_1 = GfxLibGetNumberOfSclkPerDramBurst (scale_mp1, GnbLibGetHeader (Gfx)); |
| 418 | GnbRegisterWriteTN (TYPE_GMM , 0x2808 , &ex1062.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 419 | |
| 420 | |
| 421 | //MC Performance settings base on memory channel configuration |
| 422 | //If 1 channel |
| 423 | ex1012.Value = 0x210; |
| 424 | ex1034.Value = 0x3; |
| 425 | if (((DramChannelPresent & GNB_GFX_DRAM_CH_0_PRESENT) != 0) && ((DramChannelPresent & GNB_GFX_DRAM_CH_1_PRESENT) != 0)) { |
| 426 | //If 2 channels |
| 427 | ex1012.Value = 0x1210; |
| 428 | ex1034.Value = 0xC3; |
| 429 | } |
| 430 | GnbRegisterWriteTN (TYPE_GMM , 0x2004 , &ex1012.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 431 | GnbRegisterWriteTN (TYPE_GMM , 0x2214 , &ex1034.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 432 | } |
| 433 | |
| 434 | /*----------------------------------------------------------------------------------------*/ |
| 435 | /** |
| 436 | * |
| 437 | * |
| 438 | * |
| 439 | * @param[in] Gfx Pointer to global GFX configuration |
| 440 | */ |
| 441 | |
| 442 | STATIC VOID |
| 443 | GfxGmcSecureGarlicAccessTN ( |
| 444 | IN GFX_PLATFORM_CONFIG *Gfx |
| 445 | ) |
| 446 | { |
| 447 | ex1064_STRUCT ex1064 ; |
| 448 | ex1065_STRUCT ex1065 ; |
| 449 | GMMx287C_STRUCT GMMx287C; |
| 450 | |
| 451 | ex1064.Value = (UINT32) (Gfx->UmaInfo.UmaBase >> 20); |
| 452 | GnbRegisterWriteTN (TYPE_GMM , 0x2868 , &ex1064.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 453 | ex1065.Value = (UINT32) (((Gfx->UmaInfo.UmaBase + Gfx->UmaInfo.UmaSize) >> 20) - 1); |
| 454 | GnbRegisterWriteTN (TYPE_GMM , 0x286c , &ex1065.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 455 | // Areag FB - 32K reserved by VBIOS for SBIOS to use |
| 456 | GMMx287C.Value = (UINT32) ((Gfx->UmaInfo.UmaBase + Gfx->UmaInfo.UmaSize - 32 * 1024) >> 12); |
| 457 | GnbRegisterWriteTN (GMMx287C_TYPE, GMMx287C_ADDRESS, &GMMx287C.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 458 | |
| 459 | } |
| 460 | |
| 461 | /*----------------------------------------------------------------------------------------*/ |
| 462 | /** |
| 463 | * Initialize C6 aperture location |
| 464 | * |
| 465 | * |
| 466 | * |
| 467 | * @param[in] Gfx Pointer to global GFX configuration |
| 468 | * |
| 469 | */ |
| 470 | STATIC VOID |
| 471 | GfxGmcInitializeC6LocationTN ( |
| 472 | IN GFX_PLATFORM_CONFIG *Gfx |
| 473 | ) |
| 474 | { |
| 475 | D18F2x118_STRUCT D18F2x118; |
| 476 | D18F1x44_STRUCT D18F1x44; |
| 477 | GMMx2870_STRUCT GMMx2870; |
| 478 | GMMx2874_STRUCT GMMx2874; |
| 479 | |
| 480 | // From D18F1x[144:140,44:40] DRAM Base/Limit, |
| 481 | // {DramBase[47:24], 00_0000h} <= address[47:0] <= {DramLimit[47:24], FF_FFFFh}. |
| 482 | GnbRegisterReadTN (D18F1x44_TYPE, D18F1x44_ADDRESS, &D18F1x44.Value, 0, GnbLibGetHeader (Gfx)); |
| 483 | // |
| 484 | // base 39:20, base = Dram Limit + 1 |
| 485 | // ex: system 256 MB on Node 0, D18F1x44.Field.DramLimit_39_24_ = 0xE (240MB -1) |
| 486 | // Node DRAM D18F1x[144:140,44:40] CC6DRAMRange D18F4x128 D18F1x120 D18F1x124 |
| 487 | // 0 256MB 0MB ~ 240 MB - 1 240 MB ~ 256 MB - 1 0 0 MB, 256 MB - 1 |
| 488 | // |
| 489 | |
| 490 | // base 39:20 |
| 491 | GMMx2870.Value = ((D18F1x44.Field.DramLimit_39_24_ + 1) << 4); |
| 492 | // top 39:20 |
| 493 | GMMx2874.Value = (((D18F1x44.Field.DramLimit_39_24_ + 1) << 24) + (16 * 0x100000) - 1) >> 20; |
| 494 | |
| 495 | // Check C6 enable, D18F2x118[CC6SaveEn] |
| 496 | GnbRegisterReadTN (TYPE_D18F2 , 0x118 , &D18F2x118.Value, 0, GnbLibGetHeader (Gfx)); |
| 497 | |
| 498 | if (D18F2x118.Field.CC6SaveEn) { |
| 499 | |
| 500 | GnbRegisterWriteTN (GMMx2874_TYPE, GMMx2874_ADDRESS, &GMMx2874.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 501 | GnbRegisterWriteTN (GMMx2870_TYPE, GMMx2870_ADDRESS, &GMMx2870.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 502 | } |
| 503 | } |
| 504 | |
| 505 | /*----------------------------------------------------------------------------------------*/ |
| 506 | /** |
| 507 | * Initialize GMC |
| 508 | * |
| 509 | * |
| 510 | * |
| 511 | * @param[in] Gfx Pointer to global GFX configuration |
| 512 | * |
| 513 | */ |
| 514 | |
| 515 | AGESA_STATUS |
| 516 | GfxGmcInitTN ( |
| 517 | IN GFX_PLATFORM_CONFIG *Gfx |
| 518 | ) |
| 519 | { |
| 520 | GMMx28D8_STRUCT GMMx28D8; |
| 521 | ex1017_STRUCT ex1017 ; |
| 522 | GNB_HANDLE *GnbHandle; |
| 523 | |
| 524 | IDS_HDT_CONSOLE (GNB_TRACE, "GfxGmcInitTN Enter\n"); |
| 525 | GnbHandle = GnbGetHandle (GnbLibGetHeader (Gfx)); |
| 526 | ASSERT (GnbHandle != NULL); |
| 527 | GnbProcessTable ( |
| 528 | GnbHandle, |
| 529 | GfxGmcColockGatingDisableTN, |
| 530 | 0, |
| 531 | GNB_TABLE_FLAGS_FORCE_S3_SAVE, |
| 532 | GnbLibGetHeader (Gfx) |
| 533 | ); |
| 534 | GfxGmcInitializeSequencerTN (Gfx); |
| 535 | GfxGmcInitializeFbLocationTN (Gfx); |
| 536 | GfxGmcSecureGarlicAccessTN (Gfx); |
| 537 | GfxGmcInitializeC6LocationTN (Gfx); |
| 538 | GnbProcessTable ( |
| 539 | GnbHandle, |
| 540 | GfxGmcInitTableTN, |
| 541 | 0, |
| 542 | GNB_TABLE_FLAGS_FORCE_S3_SAVE, |
| 543 | GnbLibGetHeader (Gfx) |
| 544 | ); |
| 545 | if (Gfx->GmcClockGating) { |
| 546 | GnbProcessTable ( |
| 547 | GnbHandle, |
| 548 | GfxGmcColockGatingEnableTN, |
| 549 | 0, |
| 550 | GNB_TABLE_FLAGS_FORCE_S3_SAVE, |
| 551 | GnbLibGetHeader (Gfx) |
| 552 | ); |
| 553 | } |
| 554 | if (Gfx->UmaSteering == excel993 ) { |
| 555 | ex1017.Value = 0x2; |
| 556 | GnbRegisterWriteTN (TYPE_GMM , 0x206c , &ex1017.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 557 | } |
| 558 | IDS_OPTION_CALLOUT (IDS_CALLOUT_GNB_GMM_REGISTER_OVERRIDE, Gfx, GnbLibGetHeader (Gfx)); |
| 559 | if (Gfx->GmcLockRegisters) { |
| 560 | GnbRegisterReadTN (GMMx28D8_TYPE, GMMx28D8_ADDRESS, &GMMx28D8.Value, 0, GnbLibGetHeader (Gfx)); |
| 561 | GMMx28D8.Field.CRITICAL_REGS_LOCK = 1; |
| 562 | GnbRegisterWriteTN (GMMx28D8_TYPE, GMMx28D8_ADDRESS, &GMMx28D8.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx)); |
| 563 | } |
| 564 | if (Gfx->GmcPowerGating != GmcPowerGatingDisabled) { |
| 565 | } |
| 566 | IDS_HDT_CONSOLE (GNB_TRACE, "GfxGmcInitTN Exit\n"); |
| 567 | return AGESA_SUCCESS; |
| 568 | } |