Angel Pons | f23ae0b | 2020-04-02 23:48:12 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 2 | |
Jan Samek | edda0f9 | 2023-04-27 10:39:27 +0200 | [diff] [blame] | 3 | #ifndef __CPU_INTEL_MODEL_206AX_CHIP_H__ |
| 4 | #define __CPU_INTEL_MODEL_206AX_CHIP_H__ |
| 5 | |
Arthur Heymans | d52bfbb | 2022-11-07 09:23:02 +0100 | [diff] [blame] | 6 | /* Keep this in sync with acpi.c */ |
| 7 | enum cpu_acpi_level { |
| 8 | CPU_ACPI_DISABLED = 0, |
| 9 | CPU_ACPI_C1, |
| 10 | CPU_ACPI_C2, |
| 11 | CPU_ACPI_C3, |
| 12 | CPU_ACPI_C6, |
| 13 | CPU_ACPI_C7, |
| 14 | CPU_ACPI_C7S, |
| 15 | }; |
| 16 | |
Patrick Rudolph | 62535b6 | 2024-03-30 19:06:20 +0100 | [diff] [blame^] | 17 | /* VR12 PSI codes */ |
| 18 | enum vr12_phases { |
| 19 | VR12_KEEP_DEFAULT = 0, /* For device-trees missing the setting */ |
| 20 | VR12_ALL_PHASES, |
| 21 | VR12_2_PHASES, |
| 22 | VR12_1_PHASE, |
| 23 | VR12_LIGHT_LOAD, |
| 24 | }; |
| 25 | |
| 26 | /* VR12 power state listing */ |
| 27 | enum vr12_psi { |
| 28 | VR12_PSI1 = 0, |
| 29 | VR12_PSI2, |
| 30 | VR12_PSI3, |
| 31 | VR12_PSI_MAX, |
| 32 | }; |
| 33 | |
| 34 | struct psi_state { |
| 35 | enum vr12_phases phases; |
| 36 | int current; /* In Amps */ |
| 37 | }; |
| 38 | |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 39 | struct cpu_intel_model_206ax_config { |
Arthur Heymans | d52bfbb | 2022-11-07 09:23:02 +0100 | [diff] [blame] | 40 | enum cpu_acpi_level acpi_c1; |
| 41 | enum cpu_acpi_level acpi_c2; |
| 42 | enum cpu_acpi_level acpi_c3; |
Duncan Laurie | 5563211 | 2012-07-16 12:19:00 -0700 | [diff] [blame] | 43 | |
| 44 | int tcc_offset; /* TCC Activation Offset */ |
Patrick Rudolph | 62535b6 | 2024-03-30 19:06:20 +0100 | [diff] [blame^] | 45 | int pp0_current_limit; /* Primary Plane Current Limit (Icc) in Amps */ |
| 46 | int pp1_current_limit; /* Secondary Plane Current Limit (IAXG) in Amps */ |
| 47 | |
| 48 | /* PSI states only have an effect when in Package C3 or higher */ |
| 49 | struct psi_state pp0_psi[3]; /* Power states for Primary Plane (Icc) */ |
| 50 | struct psi_state pp1_psi[3]; /* Power states for Secondary Plane (IAXG) */ |
Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 51 | }; |
Jan Samek | edda0f9 | 2023-04-27 10:39:27 +0200 | [diff] [blame] | 52 | |
| 53 | #endif /* __CPU_INTEL_MODEL_206AX_CHIP_H__ */ |