blob: 399196489a9ee6cd63b798d09b0dfa997fddb4fc [file] [log] [blame]
Yidi Lin24ea3f32021-01-07 20:25:54 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
Rex-BC Chen61be50d2021-08-10 12:39:32 +08003#include <bootmem.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +08004#include <device/device.h>
Nina Wuc25aa5b2021-06-21 09:13:19 +08005#include <soc/devapc.h>
Rex-BC Chen61be50d2021-08-10 12:39:32 +08006#include <soc/dfd.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +08007#include <soc/emi.h>
Rex-BC Chen8316db22021-08-13 16:34:26 +08008#include <soc/hdmi.h>
alex.miao4a2887f2021-05-17 21:58:55 +08009#include <soc/mcupm.h>
Yidi Lin27be9042021-03-25 17:50:14 +080010#include <soc/mmu_operations.h>
Rex-BC Chenab2cbf72021-05-03 20:44:09 +080011#include <soc/sspm.h>
Yidi Linbe8621d2021-04-19 16:06:55 +080012#include <soc/ufs.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +080013#include <symbols.h>
14
Rex-BC Chen61be50d2021-08-10 12:39:32 +080015void bootmem_platform_add_ranges(void)
16{
17 if (CONFIG(MTK_DFD))
18 bootmem_add_range(DFD_DUMP_ADDRESS, DFD_DUMP_SIZE, BM_MEM_RESERVED);
19}
20
Yidi Lin24ea3f32021-01-07 20:25:54 +080021static void soc_read_resources(struct device *dev)
22{
23 ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
24}
25
26static void soc_init(struct device *dev)
27{
Yidi Lin27be9042021-03-25 17:50:14 +080028 mtk_mmu_disable_l2c_sram();
Nina Wuc25aa5b2021-06-21 09:13:19 +080029 dapc_init();
alex.miao4a2887f2021-05-17 21:58:55 +080030 mcupm_init();
Rex-BC Chenab2cbf72021-05-03 20:44:09 +080031 sspm_init();
Rex-BC Chen61be50d2021-08-10 12:39:32 +080032
33 if (CONFIG(MTK_DFD))
34 dfd_init();
35
Yidi Linbe8621d2021-04-19 16:06:55 +080036 ufs_disable_refclk();
Rex-BC Chen8316db22021-08-13 16:34:26 +080037 hdmi_low_power_setting();
Yidi Lin24ea3f32021-01-07 20:25:54 +080038}
39
40static struct device_operations soc_ops = {
41 .read_resources = soc_read_resources,
42 .init = soc_init,
43};
44
45static void enable_soc_dev(struct device *dev)
46{
47 dev->ops = &soc_ops;
48}
49
50struct chip_operations soc_mediatek_mt8195_ops = {
51 CHIP_NAME("SOC Mediatek MT8195")
52 .enable_dev = enable_soc_dev,
53};