blob: 638056487b3750b8202728409f5b19b6935759ea [file] [log] [blame]
Yidi Lin24ea3f32021-01-07 20:25:54 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <device/device.h>
Nina Wuc25aa5b2021-06-21 09:13:19 +08004#include <soc/devapc.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +08005#include <soc/emi.h>
Rex-BC Chen8316db22021-08-13 16:34:26 +08006#include <soc/hdmi.h>
alex.miao4a2887f2021-05-17 21:58:55 +08007#include <soc/mcupm.h>
Yidi Lin27be9042021-03-25 17:50:14 +08008#include <soc/mmu_operations.h>
Rex-BC Chenab2cbf72021-05-03 20:44:09 +08009#include <soc/sspm.h>
Yidi Linbe8621d2021-04-19 16:06:55 +080010#include <soc/ufs.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +080011#include <symbols.h>
12
13static void soc_read_resources(struct device *dev)
14{
15 ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
16}
17
18static void soc_init(struct device *dev)
19{
Yidi Lin27be9042021-03-25 17:50:14 +080020 mtk_mmu_disable_l2c_sram();
Nina Wuc25aa5b2021-06-21 09:13:19 +080021 dapc_init();
alex.miao4a2887f2021-05-17 21:58:55 +080022 mcupm_init();
Rex-BC Chenab2cbf72021-05-03 20:44:09 +080023 sspm_init();
Yidi Linbe8621d2021-04-19 16:06:55 +080024 ufs_disable_refclk();
Rex-BC Chen8316db22021-08-13 16:34:26 +080025 hdmi_low_power_setting();
Yidi Lin24ea3f32021-01-07 20:25:54 +080026}
27
28static struct device_operations soc_ops = {
29 .read_resources = soc_read_resources,
30 .init = soc_init,
31};
32
33static void enable_soc_dev(struct device *dev)
34{
35 dev->ops = &soc_ops;
36}
37
38struct chip_operations soc_mediatek_mt8195_ops = {
39 CHIP_NAME("SOC Mediatek MT8195")
40 .enable_dev = enable_soc_dev,
41};