| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Google Inc. |
| 5 | * Copyright (C) 2015 Intel Corp. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc. |
| 19 | */ |
| 20 | |
| 21 | #ifndef ONBOARD_H |
| 22 | #define ONBOARD_H |
| 23 | |
| 24 | #include "irqroute.h" |
| 25 | |
| 26 | /* |
| 27 | * Calculation of gpio based irq. |
| 28 | * Gpio banks ordering : GPSW, GPNC, GPEC, GPSE |
| 29 | * Max direct irq (MAX_DIRECT_IRQ) is 114. |
| 30 | * Size of gpio banks are |
| 31 | * GPSW_SIZE = 98 |
| 32 | * GPNC_SIZE = 73 |
| 33 | * GPEC_SIZE = 27 |
| 34 | * GPSE_SIZE = 86 |
| 35 | */ |
| 36 | |
| 37 | /* |
| 38 | * gpio based irq for kbd, 17th index in North Bank |
| 39 | * MAX_DIRECT_IRQ + GPSW_SIZE + 18 |
| 40 | */ |
| 41 | /* ToDo: change kbd irq to gpio bank index */ |
| 42 | #define BOARD_I8042_IRQ 182 |
| 43 | |
| 44 | #define BOARD_TOUCH_IRQ 156 |
| 45 | #define BOARD_DVT_TOUCH_IRQ 184 |
| 46 | |
| 47 | |
| 48 | /* Audio: Gpio index in SW bank */ |
| 49 | #define JACK_DETECT_GPIO_INDEX 95 |
| 50 | /* SCI: Gpio index in N bank */ |
| 51 | #define BOARD_SCI_GPIO_INDEX 15 |
| 52 | /* Trackpad: Gpio index in N bank */ |
| 53 | #define BOARD_TRACKPAD_GPIO_INDEX 18 |
| 54 | |
| 55 | #define BOARD_TRACKPAD_NAME "trackpad" |
| 56 | #define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1) |
| 57 | #define BOARD_TRACKPAD_I2C_BUS 5 |
| 58 | #define BOARD_TRACKPAD_I2C_ADDR 0x15 |
| 59 | |
| 60 | #define BOARD_TOUCHSCREEN_NAME "touchscreen" |
| 61 | #define BOARD_TOUCHSCREEN_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(2) |
| 62 | #define BOARD_TOUCHSCREEN_I2C_BUS 0 |
| 63 | #define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a /* TODO(shawnn): Check this */ |
| 64 | |
| 65 | #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) |
| 66 | |
| 67 | |
| 68 | /* SD CARD gpio */ |
| 69 | #define SDCARD_CD 81 |
| 70 | |
| 71 | #define AUDIO_CODEC_HID "10EC5650" |
| 72 | #define AUDIO_CODEC_CID "10EC5650" |
| 73 | #define AUDIO_CODEC_DDN "RTEK Codec Controller " |
| 74 | #define AUDIO_CODEC_I2C_ADDR 0x1A |
| 75 | |
| 76 | #define BOARD_EVT 0x02 |
| 77 | #define BOARD_DVT 0x03 |
| 78 | #define BOARD_BCRD2 0x04 |
| 79 | |
| 80 | #define BCRD2_PMIC_I2C_BUS 0x01 |
| 81 | |
| 82 | #endif |