Mike Loptien | c93a75a | 2014-06-06 15:16:29 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Sage Electronic Engineering, LLC. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Mike Loptien | c93a75a | 2014-06-06 15:16:29 -0600 | [diff] [blame] | 14 | */ |
| 15 | |
Martin Roth | 5933814 | 2016-01-11 12:42:35 -0700 | [diff] [blame^] | 16 | #ifndef _CIMX_SB800_PCI_DEVS_H_ |
| 17 | #define _CIMX_SB800_PCI_DEVS_H_ |
Mike Loptien | c93a75a | 2014-06-06 15:16:29 -0600 | [diff] [blame] | 18 | |
| 19 | #define BUS0 0 |
| 20 | |
| 21 | /* SATA */ |
| 22 | #define SATA_DEV 0x11 |
| 23 | #define SATA_FUNC 0 |
| 24 | # define SATA_IDE_DEVID 0x4390 |
| 25 | # define AHCI_DEVID 0x4391 |
| 26 | # define RAID_DEVID 0x4392 |
| 27 | # define RAID5_DEVID 0x4393 |
| 28 | # define SATA_DEVFN PCI_DEVFN(SATA_DEV,SATA_FUNC) |
| 29 | |
| 30 | /* OHCI */ |
| 31 | #define OHCI1_DEV 0x12 |
| 32 | #define OHCI1_FUNC 0 |
| 33 | #define OHCI2_DEV 0x13 |
| 34 | #define OHCI2_FUNC 0 |
| 35 | #define OHCI3_DEV 0x16 |
| 36 | #define OHCI3_FUNC 0 |
| 37 | #define OHCI4_DEV 0x14 |
| 38 | #define OHCI4_FUNC 5 |
| 39 | # define OHCI_DEVID 0x4397 |
| 40 | # define OHCI1_DEVFN PCI_DEVFN(OHCI1_DEV,OHCI1_FUNC) |
| 41 | # define OHCI2_DEVFN PCI_DEVFN(OHCI2_DEV,OHCI2_FUNC) |
| 42 | # define OHCI3_DEVFN PCI_DEVFN(OHCI3_DEV,OHCI3_FUNC) |
| 43 | # define OHCI4_DEVFN PCI_DEVFN(OHCI4_DEV,OHCI4_FUNC) |
| 44 | |
| 45 | /* EHCI */ |
| 46 | #define EHCI1_DEV 0x12 |
| 47 | #define EHCI1_FUNC 2 |
| 48 | #define EHCI2_DEV 0x13 |
| 49 | #define EHCI2_FUNC 2 |
| 50 | #define EHCI3_DEV 0x16 |
| 51 | #define EHCI3_FUNC 2 |
| 52 | # define EHCI_DEVID 0x4396 |
| 53 | # define EHCI1_DEVFN PCI_DEVFN(EHCI1_DEV,EHCI1_FUNC) |
| 54 | # define EHCI2_DEVFN PCI_DEVFN(EHCI2_DEV,EHCI2_FUNC) |
| 55 | # define EHCI3_DEVFN PCI_DEVFN(EHCI3_DEV,EHCI3_FUNC) |
| 56 | |
| 57 | /* IDE */ |
| 58 | #define IDE_DEV 0x14 |
| 59 | #define IDE_FUNC 1 |
| 60 | # define IDE_DEVID 0x439C |
| 61 | # define IDE_DEVFN PCI_DEVFN(IDE_DEV,IDE_FUNC) |
| 62 | |
| 63 | /* HD Audio */ |
| 64 | #define HDA_DEV 0x14 |
| 65 | #define HDA_FUNC 2 |
| 66 | # define HDA_DEVID 0x4383 |
| 67 | # define HDA_DEVFN PCI_DEVFN(HDA_DEV,HDA_FUNC) |
| 68 | |
| 69 | /* PCI Ports */ |
| 70 | #define SB_PCI_PORT_DEV 0x14 |
| 71 | #define SB_PCI_PORT_FUNC 4 |
| 72 | # define SB_PCI_PORT_DEVID 0x4384 |
| 73 | # define SB_PCI_PORT_DEVFN PCI_DEVFN(SB_PCI_PORT_DEV,SB_PCI_PORT_FUNC) |
| 74 | |
| 75 | /* PCIe Ports */ |
| 76 | #define SB_PCIE_DEV 0x15 |
| 77 | #define SB_PCIE_PORT1_FUNC 0 |
| 78 | #define SB_PCIE_PORT2_FUNC 1 |
| 79 | #define SB_PCIE_PORT3_FUNC 2 |
| 80 | #define SB_PCIE_PORT4_FUNC 3 |
| 81 | # define SB_PCIE_PORT1_DEVID 0x43A0 |
| 82 | # define SB_PCIE_PORT2_DEVID 0x43A1 |
| 83 | # define SB_PCIE_PORT3_DEVID 0x43A2 |
| 84 | # define SB_PCIE_PORT4_DEVID 0x43A3 |
| 85 | # define SB_PCIE_PORT1_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT1_FUNC) |
| 86 | # define SB_PCIE_PORT2_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT2_FUNC) |
| 87 | # define SB_PCIE_PORT3_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT3_FUNC) |
| 88 | # define SB_PCIE_PORT4_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT4_FUNC) |
| 89 | |
| 90 | /* Fusion Controller Hub */ |
| 91 | #define PCU_DEV 0x14 |
| 92 | #define LPC_DEV PCU_DEV |
| 93 | #define LPC_FUNC 3 |
| 94 | #define SMBUS_DEV 0x14 |
| 95 | #define SMBUS_FUNC 0 |
| 96 | # define LPC_DEVID 0x439D |
| 97 | # define SMBUS_DEVID 0x4385 |
| 98 | # define LPC_DEVFN PCI_DEVFN(LPC_DEV,LPC_FUNC) |
| 99 | # define SMBUS_DEVFN PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC) |
| 100 | |
| 101 | #endif /* _CIMX_SB800_PCI_DEVS_H_ */ |