| Angel Pons | 60ec365 | 2020-04-03 01:22:13 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Rizwan Qureshi | 06868f8 | 2016-08-23 13:38:19 +0530 | [diff] [blame] | 2 | |
| Rizwan Qureshi | 5ff7390 | 2016-08-24 20:50:54 +0530 | [diff] [blame] | 3 | #include <fsp/api.h> |
| 4 | #include <gpio.h> |
| 5 | #include "gpio.h" |
| Rizwan Qureshi | 06868f8 | 2016-08-23 13:38:19 +0530 | [diff] [blame] | 6 | #include <soc/romstage.h> |
| Rizwan Qureshi | 5ff7390 | 2016-08-24 20:50:54 +0530 | [diff] [blame] | 7 | #include "spd/spd.h" |
| Rizwan Qureshi | 06868f8 | 2016-08-23 13:38:19 +0530 | [diff] [blame] | 8 | |
| Rizwan Qureshi | 5ff7390 | 2016-08-24 20:50:54 +0530 | [diff] [blame] | 9 | void mainboard_memory_init_params(FSPM_UPD *mupd) |
| Rizwan Qureshi | 06868f8 | 2016-08-23 13:38:19 +0530 | [diff] [blame] | 10 | { |
| Rizwan Qureshi | 5ff7390 | 2016-08-24 20:50:54 +0530 | [diff] [blame] | 11 | FSP_M_CONFIG *mem_cfg; |
| 12 | mem_cfg = &mupd->FspmConfig; |
| 13 | |
| Michael Niewöhner | dd32103 | 2019-10-09 21:02:36 +0200 | [diff] [blame] | 14 | mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0, &mem_cfg->DqByteMapCh1); |
| 15 | mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0, &mem_cfg->DqsMapCpu2DramCh1); |
| Rizwan Qureshi | 5ff7390 | 2016-08-24 20:50:54 +0530 | [diff] [blame] | 16 | mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor); |
| 17 | mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget); |
| 18 | |
| 19 | mem_cfg->DqPinsInterleaved = 0; |
| 20 | mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data(); |
| 21 | if (mainboard_has_dual_channel_mem()) |
| 22 | mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00; |
| 23 | mem_cfg->MemorySpdDataLen = SPD_LEN; |
| Rizwan Qureshi | 06868f8 | 2016-08-23 13:38:19 +0530 | [diff] [blame] | 24 | } |