commit 5ff7390fcd74fe1cd94d2507cf7c04b1c1eff620
author Rizwan Qureshi <rizwan.qureshi@intel.com> Wed Aug 24 20:50:54 2016 +0530
committer Martin Roth <martinroth@google.com> Thu Sep 15 01:15:27 2016 +0200
tree 88ed9f3dc2f5f00aca84af5773debfabd3166120
parent 5bf42c6c23b462d9292e6854d3f334cf17e42825

kunimitsu: Add FSP 2.0 support in romstage

Populate mainboard related Memory Init Params i.e, SPD
Rcomp values, DQ and DQs values.

Change-Id: Id62c43a72a0e34fa2e8d177ce895d395418e2347
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/16316
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/intel/kunimitsu/romstage_fsp20.c

diff --git a/src/mainboard/intel/kunimitsu/romstage_fsp20.c b/src/mainboard/intel/kunimitsu/romstage_fsp20.c
index 10bdd21..d4fd113 100644
--- a/src/mainboard/intel/kunimitsu/romstage_fsp20.c
+++ b/src/mainboard/intel/kunimitsu/romstage_fsp20.c
@@ -13,9 +13,30 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/byteorder.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/api.h>
+#include <gpio.h>
+#include "gpio.h"
 #include <soc/romstage.h>
+#include <soc/gpio.h>
+#include "spd/spd.h"
+#include <string.h>
 
-void mainboard_memory_init_params(struct FSPM_UPD *mupd)
+void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
-	/* TODO: Read and copy SPD and fill up Rcomp and DQ param */
+	FSP_M_CONFIG *mem_cfg;
+	mem_cfg = &mupd->FspmConfig;
+
+	mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0);
+	mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0);
+	mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
+	mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
+
+	mem_cfg->DqPinsInterleaved = 0;
+	mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data();
+	if (mainboard_has_dual_channel_mem())
+		mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
+	mem_cfg->MemorySpdDataLen = SPD_LEN;
 }