Patrick Georgi | 406313d | 2015-07-20 22:01:32 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * Copyright (C) 2015 Google Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc. |
| 19 | */ |
| 20 | |
| 21 | #include <arch/io.h> |
| 22 | #include <console/console.h> |
| 23 | #include <cpu/x86/smm.h> |
| 24 | #include <elog.h> |
| 25 | #include <ec/google/chromeec/ec.h> |
| 26 | #include <soc/iomap.h> |
| 27 | #include <soc/nvs.h> |
| 28 | #include <soc/pm.h> |
| 29 | #include <soc/smm.h> |
| 30 | #include "ec.h" |
| 31 | |
| 32 | int mainboard_io_trap_handler(int smif) |
| 33 | { |
| 34 | switch (smif) { |
| 35 | case 0x99: |
| 36 | printk(BIOS_DEBUG, "Sample\n"); |
| 37 | smm_get_gnvs()->smif = 0; |
| 38 | break; |
| 39 | default: |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | /* On success, the IO Trap Handler returns 0 |
| 44 | * On failure, the IO Trap Handler returns a value != 0 |
| 45 | * |
| 46 | * For now, we force the return value to 0 and log all traps to |
| 47 | * see what's going on. |
| 48 | */ |
| 49 | return 1; |
| 50 | } |
| 51 | |
| 52 | static u8 mainboard_smi_ec(void) |
| 53 | { |
| 54 | u8 cmd = 0; |
| 55 | #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |
| 56 | u32 pm1_cnt; |
| 57 | cmd = google_chromeec_get_event(); |
| 58 | |
| 59 | /* Log this event */ |
| 60 | if (IS_ENABLED(CONFIG_ELOG_GSMI) && cmd) |
| 61 | elog_add_event_byte(ELOG_TYPE_EC_EVENT, cmd); |
| 62 | |
| 63 | switch (cmd) { |
| 64 | case EC_HOST_EVENT_LID_CLOSED: |
| 65 | printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n"); |
| 66 | |
| 67 | /* Go to S5 */ |
| 68 | pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); |
| 69 | pm1_cnt |= (0xf << 10); |
| 70 | outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT); |
| 71 | break; |
| 72 | } |
| 73 | #endif |
| 74 | return cmd; |
| 75 | } |
| 76 | |
Aaron Durbin | 50ed38f | 2015-08-08 01:25:21 -0500 | [diff] [blame^] | 77 | void mainboard_smi_gpi_handler(const struct gpi_status *sts) |
Patrick Georgi | 406313d | 2015-07-20 22:01:32 +0200 | [diff] [blame] | 78 | { |
Aaron Durbin | 50ed38f | 2015-08-08 01:25:21 -0500 | [diff] [blame^] | 79 | if (gpi_status_get(sts, EC_SMI_GPI)) { |
Patrick Georgi | 406313d | 2015-07-20 22:01:32 +0200 | [diff] [blame] | 80 | /* Process all pending events */ |
| 81 | while (mainboard_smi_ec() != 0) |
| 82 | ; |
| 83 | } |
| 84 | } |
| 85 | |
| 86 | void mainboard_smi_sleep(u8 slp_typ) |
| 87 | { |
| 88 | #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |
| 89 | /* Disable USB charging if required */ |
| 90 | switch (slp_typ) { |
| 91 | case 3: |
| 92 | if (smm_get_gnvs()->s3u0 == 0) { |
| 93 | google_chromeec_set_usb_charge_mode( |
| 94 | 0, USB_CHARGE_MODE_DISABLED); |
| 95 | google_chromeec_set_usb_charge_mode( |
| 96 | 1, USB_CHARGE_MODE_DISABLED); |
| 97 | } |
| 98 | |
| 99 | /* Enable wake events */ |
| 100 | google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); |
| 101 | break; |
| 102 | case 5: |
| 103 | if (smm_get_gnvs()->s5u0 == 0) { |
| 104 | google_chromeec_set_usb_charge_mode( |
| 105 | 0, USB_CHARGE_MODE_DISABLED); |
| 106 | google_chromeec_set_usb_charge_mode( |
| 107 | 1, USB_CHARGE_MODE_DISABLED); |
| 108 | } |
| 109 | |
| 110 | /* Enable wake events */ |
| 111 | google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); |
| 112 | break; |
| 113 | } |
| 114 | |
| 115 | /* Disable SCI and SMI events */ |
| 116 | google_chromeec_set_smi_mask(0); |
| 117 | google_chromeec_set_sci_mask(0); |
| 118 | |
| 119 | /* Clear pending events that may trigger immediate wake */ |
| 120 | while (google_chromeec_get_event() != 0) |
| 121 | ; |
| 122 | #endif |
| 123 | } |
| 124 | |
| 125 | int mainboard_smi_apmc(u8 apmc) |
| 126 | { |
| 127 | #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |
| 128 | switch (apmc) { |
| 129 | case APM_CNT_ACPI_ENABLE: |
| 130 | google_chromeec_set_smi_mask(0); |
| 131 | /* Clear all pending events */ |
| 132 | while (google_chromeec_get_event() != 0) |
| 133 | ; |
| 134 | google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS); |
| 135 | break; |
| 136 | case APM_CNT_ACPI_DISABLE: |
| 137 | google_chromeec_set_sci_mask(0); |
| 138 | /* Clear all pending events */ |
| 139 | while (google_chromeec_get_event() != 0) |
| 140 | ; |
| 141 | google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS); |
| 142 | break; |
| 143 | } |
| 144 | #endif |
| 145 | return 0; |
| 146 | } |