Angel Pons | 6e5aabd | 2020-03-23 23:44:42 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 2 | |
| 3 | #include <arch/io.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 5 | #include <console/console.h> |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 6 | #include <bootmode.h> |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 7 | #include <delay.h> |
| 8 | #include <device/device.h> |
| 9 | #include <device/pci.h> |
| 10 | #include <device/pci_ids.h> |
Ronald G. Minnich | 69efaa0 | 2013-02-26 10:07:40 -0800 | [diff] [blame] | 11 | #include <device/pci_ops.h> |
Nico Huber | 1822816 | 2017-06-08 16:31:57 +0200 | [diff] [blame] | 12 | #include <drivers/intel/gma/libgfxinit.h> |
Patrick Rudolph | 281ccca | 2017-04-12 16:55:32 +0200 | [diff] [blame] | 13 | #include <southbridge/intel/bd82x6x/nvs.h> |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 14 | #include <drivers/intel/gma/opregion.h> |
Patrick Rudolph | da9302a | 2019-03-24 17:01:41 +0100 | [diff] [blame] | 15 | #include <southbridge/intel/bd82x6x/pch.h> |
Patrick Rudolph | 281ccca | 2017-04-12 16:55:32 +0200 | [diff] [blame] | 16 | #include <cbmem.h> |
Elyes HAOUAS | 51401c3 | 2019-05-15 21:09:30 +0200 | [diff] [blame] | 17 | #include <types.h> |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 18 | |
| 19 | #include "chip.h" |
| 20 | #include "sandybridge.h" |
Patrick Rudolph | 45a0dbc | 2017-03-30 17:07:42 +0200 | [diff] [blame] | 21 | #include "gma.h" |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 22 | |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 23 | struct gt_powermeter { |
| 24 | u16 reg; |
| 25 | u32 value; |
| 26 | }; |
| 27 | |
Stefan Reinauer | 4c8027a | 2012-09-07 10:53:56 -0700 | [diff] [blame] | 28 | static const struct gt_powermeter snb_pm_gt1[] = { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 29 | { 0xa200, 0xcc000000 }, |
| 30 | { 0xa204, 0x07000040 }, |
| 31 | { 0xa208, 0x0000fe00 }, |
| 32 | { 0xa20c, 0x00000000 }, |
| 33 | { 0xa210, 0x17000000 }, |
| 34 | { 0xa214, 0x00000021 }, |
| 35 | { 0xa218, 0x0817fe19 }, |
| 36 | { 0xa21c, 0x00000000 }, |
| 37 | { 0xa220, 0x00000000 }, |
| 38 | { 0xa224, 0xcc000000 }, |
| 39 | { 0xa228, 0x07000040 }, |
| 40 | { 0xa22c, 0x0000fe00 }, |
| 41 | { 0xa230, 0x00000000 }, |
| 42 | { 0xa234, 0x17000000 }, |
| 43 | { 0xa238, 0x00000021 }, |
| 44 | { 0xa23c, 0x0817fe19 }, |
| 45 | { 0xa240, 0x00000000 }, |
| 46 | { 0xa244, 0x00000000 }, |
| 47 | { 0xa248, 0x8000421e }, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 48 | { 0 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 49 | }; |
| 50 | |
Stefan Reinauer | 4c8027a | 2012-09-07 10:53:56 -0700 | [diff] [blame] | 51 | static const struct gt_powermeter snb_pm_gt2[] = { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 52 | { 0xa200, 0x330000a6 }, |
| 53 | { 0xa204, 0x402d0031 }, |
| 54 | { 0xa208, 0x00165f83 }, |
| 55 | { 0xa20c, 0xf1000000 }, |
| 56 | { 0xa210, 0x00000000 }, |
| 57 | { 0xa214, 0x00160016 }, |
| 58 | { 0xa218, 0x002a002b }, |
| 59 | { 0xa21c, 0x00000000 }, |
| 60 | { 0xa220, 0x00000000 }, |
| 61 | { 0xa224, 0x330000a6 }, |
| 62 | { 0xa228, 0x402d0031 }, |
| 63 | { 0xa22c, 0x00165f83 }, |
| 64 | { 0xa230, 0xf1000000 }, |
| 65 | { 0xa234, 0x00000000 }, |
| 66 | { 0xa238, 0x00160016 }, |
| 67 | { 0xa23c, 0x002a002b }, |
| 68 | { 0xa240, 0x00000000 }, |
| 69 | { 0xa244, 0x00000000 }, |
| 70 | { 0xa248, 0x8000421e }, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 71 | { 0 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 72 | }; |
| 73 | |
Stefan Reinauer | 4c8027a | 2012-09-07 10:53:56 -0700 | [diff] [blame] | 74 | static const struct gt_powermeter ivb_pm_gt1[] = { |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 75 | { 0xa800, 0x00000000 }, |
| 76 | { 0xa804, 0x00021c00 }, |
| 77 | { 0xa808, 0x00000403 }, |
| 78 | { 0xa80c, 0x02001700 }, |
| 79 | { 0xa810, 0x05000200 }, |
| 80 | { 0xa814, 0x00000000 }, |
| 81 | { 0xa818, 0x00690500 }, |
| 82 | { 0xa81c, 0x0000007f }, |
| 83 | { 0xa820, 0x01002501 }, |
| 84 | { 0xa824, 0x00000300 }, |
| 85 | { 0xa828, 0x01000331 }, |
| 86 | { 0xa82c, 0x0000000c }, |
| 87 | { 0xa830, 0x00010016 }, |
| 88 | { 0xa834, 0x01100101 }, |
| 89 | { 0xa838, 0x00010103 }, |
| 90 | { 0xa83c, 0x00041300 }, |
| 91 | { 0xa840, 0x00000b30 }, |
| 92 | { 0xa844, 0x00000000 }, |
| 93 | { 0xa848, 0x7f000000 }, |
| 94 | { 0xa84c, 0x05000008 }, |
| 95 | { 0xa850, 0x00000001 }, |
| 96 | { 0xa854, 0x00000004 }, |
| 97 | { 0xa858, 0x00000007 }, |
| 98 | { 0xa85c, 0x00000000 }, |
| 99 | { 0xa860, 0x00010000 }, |
| 100 | { 0xa248, 0x0000221e }, |
| 101 | { 0xa900, 0x00000000 }, |
| 102 | { 0xa904, 0x00001c00 }, |
| 103 | { 0xa908, 0x00000000 }, |
| 104 | { 0xa90c, 0x06000000 }, |
| 105 | { 0xa910, 0x09000200 }, |
| 106 | { 0xa914, 0x00000000 }, |
| 107 | { 0xa918, 0x00590000 }, |
| 108 | { 0xa91c, 0x00000000 }, |
| 109 | { 0xa920, 0x04002501 }, |
| 110 | { 0xa924, 0x00000100 }, |
| 111 | { 0xa928, 0x03000410 }, |
| 112 | { 0xa92c, 0x00000000 }, |
| 113 | { 0xa930, 0x00020000 }, |
| 114 | { 0xa934, 0x02070106 }, |
| 115 | { 0xa938, 0x00010100 }, |
| 116 | { 0xa93c, 0x00401c00 }, |
| 117 | { 0xa940, 0x00000000 }, |
| 118 | { 0xa944, 0x00000000 }, |
| 119 | { 0xa948, 0x10000e00 }, |
| 120 | { 0xa94c, 0x02000004 }, |
| 121 | { 0xa950, 0x00000001 }, |
| 122 | { 0xa954, 0x00000004 }, |
| 123 | { 0xa960, 0x00060000 }, |
| 124 | { 0xaa3c, 0x00001c00 }, |
| 125 | { 0xaa54, 0x00000004 }, |
| 126 | { 0xaa60, 0x00060000 }, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 127 | { 0 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 128 | }; |
| 129 | |
Stefan Reinauer | 4c8027a | 2012-09-07 10:53:56 -0700 | [diff] [blame] | 130 | static const struct gt_powermeter ivb_pm_gt2_17w[] = { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 131 | { 0xa800, 0x20000000 }, |
| 132 | { 0xa804, 0x000e3800 }, |
| 133 | { 0xa808, 0x00000806 }, |
| 134 | { 0xa80c, 0x0c002f00 }, |
| 135 | { 0xa810, 0x0c000800 }, |
| 136 | { 0xa814, 0x00000000 }, |
| 137 | { 0xa818, 0x00d20d00 }, |
| 138 | { 0xa81c, 0x000000ff }, |
| 139 | { 0xa820, 0x03004b02 }, |
| 140 | { 0xa824, 0x00000600 }, |
| 141 | { 0xa828, 0x07000773 }, |
| 142 | { 0xa82c, 0x00000000 }, |
| 143 | { 0xa830, 0x00020032 }, |
| 144 | { 0xa834, 0x1520040d }, |
| 145 | { 0xa838, 0x00020105 }, |
| 146 | { 0xa83c, 0x00083700 }, |
| 147 | { 0xa840, 0x000016ff }, |
| 148 | { 0xa844, 0x00000000 }, |
| 149 | { 0xa848, 0xff000000 }, |
| 150 | { 0xa84c, 0x0a000010 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 151 | { 0xa850, 0x00000002 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 152 | { 0xa854, 0x00000008 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 153 | { 0xa858, 0x0000000f }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 154 | { 0xa85c, 0x00000000 }, |
| 155 | { 0xa860, 0x00020000 }, |
| 156 | { 0xa248, 0x0000221e }, |
| 157 | { 0xa900, 0x00000000 }, |
| 158 | { 0xa904, 0x00003800 }, |
| 159 | { 0xa908, 0x00000000 }, |
| 160 | { 0xa90c, 0x0c000000 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 161 | { 0xa910, 0x12000800 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 162 | { 0xa914, 0x00000000 }, |
| 163 | { 0xa918, 0x00b20000 }, |
| 164 | { 0xa91c, 0x00000000 }, |
| 165 | { 0xa920, 0x08004b02 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 166 | { 0xa924, 0x00000300 }, |
| 167 | { 0xa928, 0x01000820 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 168 | { 0xa92c, 0x00000000 }, |
| 169 | { 0xa930, 0x00030000 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 170 | { 0xa934, 0x15150406 }, |
| 171 | { 0xa938, 0x00020300 }, |
| 172 | { 0xa93c, 0x00903900 }, |
| 173 | { 0xa940, 0x00000000 }, |
| 174 | { 0xa944, 0x00000000 }, |
| 175 | { 0xa948, 0x20001b00 }, |
| 176 | { 0xa94c, 0x0a000010 }, |
| 177 | { 0xa950, 0x00000000 }, |
| 178 | { 0xa954, 0x00000008 }, |
| 179 | { 0xa960, 0x00110000 }, |
| 180 | { 0xaa3c, 0x00003900 }, |
| 181 | { 0xaa54, 0x00000008 }, |
| 182 | { 0xaa60, 0x00110000 }, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 183 | { 0 }, |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 184 | }; |
| 185 | |
Stefan Reinauer | 4c8027a | 2012-09-07 10:53:56 -0700 | [diff] [blame] | 186 | static const struct gt_powermeter ivb_pm_gt2_35w[] = { |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 187 | { 0xa800, 0x00000000 }, |
| 188 | { 0xa804, 0x00030400 }, |
| 189 | { 0xa808, 0x00000806 }, |
| 190 | { 0xa80c, 0x0c002f00 }, |
| 191 | { 0xa810, 0x0c000300 }, |
| 192 | { 0xa814, 0x00000000 }, |
| 193 | { 0xa818, 0x00d20d00 }, |
| 194 | { 0xa81c, 0x000000ff }, |
| 195 | { 0xa820, 0x03004b02 }, |
| 196 | { 0xa824, 0x00000600 }, |
| 197 | { 0xa828, 0x07000773 }, |
| 198 | { 0xa82c, 0x00000000 }, |
| 199 | { 0xa830, 0x00020032 }, |
| 200 | { 0xa834, 0x1520040d }, |
| 201 | { 0xa838, 0x00020105 }, |
| 202 | { 0xa83c, 0x00083700 }, |
| 203 | { 0xa840, 0x000016ff }, |
| 204 | { 0xa844, 0x00000000 }, |
| 205 | { 0xa848, 0xff000000 }, |
| 206 | { 0xa84c, 0x0a000010 }, |
| 207 | { 0xa850, 0x00000001 }, |
| 208 | { 0xa854, 0x00000008 }, |
| 209 | { 0xa858, 0x00000008 }, |
| 210 | { 0xa85c, 0x00000000 }, |
| 211 | { 0xa860, 0x00020000 }, |
| 212 | { 0xa248, 0x0000221e }, |
| 213 | { 0xa900, 0x00000000 }, |
| 214 | { 0xa904, 0x00003800 }, |
| 215 | { 0xa908, 0x00000000 }, |
| 216 | { 0xa90c, 0x0c000000 }, |
| 217 | { 0xa910, 0x12000800 }, |
| 218 | { 0xa914, 0x00000000 }, |
| 219 | { 0xa918, 0x00b20000 }, |
| 220 | { 0xa91c, 0x00000000 }, |
| 221 | { 0xa920, 0x08004b02 }, |
| 222 | { 0xa924, 0x00000300 }, |
| 223 | { 0xa928, 0x01000820 }, |
| 224 | { 0xa92c, 0x00000000 }, |
| 225 | { 0xa930, 0x00030000 }, |
| 226 | { 0xa934, 0x15150406 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 227 | { 0xa938, 0x00020300 }, |
| 228 | { 0xa93c, 0x00903900 }, |
| 229 | { 0xa940, 0x00000000 }, |
| 230 | { 0xa944, 0x00000000 }, |
| 231 | { 0xa948, 0x20001b00 }, |
| 232 | { 0xa94c, 0x0a000010 }, |
| 233 | { 0xa950, 0x00000000 }, |
| 234 | { 0xa954, 0x00000008 }, |
| 235 | { 0xa960, 0x00110000 }, |
| 236 | { 0xaa3c, 0x00003900 }, |
| 237 | { 0xaa54, 0x00000008 }, |
| 238 | { 0xaa60, 0x00110000 }, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 239 | { 0 }, |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 240 | }; |
| 241 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 242 | /* |
| 243 | * Some VGA option roms are used for several chipsets but they only have one PCI ID in their |
| 244 | * header. If we encounter such an option rom, we need to do the mapping ourselves. |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 245 | */ |
| 246 | |
| 247 | u32 map_oprom_vendev(u32 vendev) |
| 248 | { |
Nico Huber | 23b93dd | 2017-07-29 01:46:23 +0200 | [diff] [blame] | 249 | u32 new_vendev = vendev; |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 250 | |
| 251 | switch (vendev) { |
Nico Huber | 23b93dd | 2017-07-29 01:46:23 +0200 | [diff] [blame] | 252 | case 0x80860102: /* SNB GT1 Desktop */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 253 | case 0x8086010a: /* SNB GT1 Server */ |
Nico Huber | 23b93dd | 2017-07-29 01:46:23 +0200 | [diff] [blame] | 254 | case 0x80860112: /* SNB GT2 Desktop */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 255 | case 0x80860116: /* SNB GT2 Mobile */ |
Nico Huber | 23b93dd | 2017-07-29 01:46:23 +0200 | [diff] [blame] | 256 | case 0x80860122: /* SNB GT2 Desktop >=1.3GHz */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 257 | case 0x80860126: /* SNB GT2 Mobile >=1.3GHz */ |
Nico Huber | 23b93dd | 2017-07-29 01:46:23 +0200 | [diff] [blame] | 258 | case 0x80860152: /* IVB GT1 Desktop */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 259 | case 0x80860156: /* IVB GT1 Mobile */ |
Nico Huber | 23b93dd | 2017-07-29 01:46:23 +0200 | [diff] [blame] | 260 | case 0x80860162: /* IVB GT2 Desktop */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 261 | case 0x80860166: /* IVB GT2 Mobile */ |
| 262 | case 0x8086016a: /* IVB GT2 Server */ |
| 263 | new_vendev = 0x80860106;/* SNB GT1 Mobile */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 264 | break; |
| 265 | } |
| 266 | |
| 267 | return new_vendev; |
| 268 | } |
| 269 | |
| 270 | static struct resource *gtt_res = NULL; |
| 271 | |
Vladimir Serbinenko | a71bdc3 | 2014-08-30 00:35:39 +0200 | [diff] [blame] | 272 | u32 gtt_read(u32 reg) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 273 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 274 | return read32(res2mmio(gtt_res, reg, 0)); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 275 | } |
| 276 | |
Vladimir Serbinenko | a71bdc3 | 2014-08-30 00:35:39 +0200 | [diff] [blame] | 277 | void gtt_write(u32 reg, u32 data) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 278 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 279 | write32(res2mmio(gtt_res, reg, 0), data); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 280 | } |
| 281 | |
Stefan Reinauer | 4c8027a | 2012-09-07 10:53:56 -0700 | [diff] [blame] | 282 | static inline void gtt_write_powermeter(const struct gt_powermeter *pm) |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 283 | { |
| 284 | for (; pm && pm->reg; pm++) |
| 285 | gtt_write(pm->reg, pm->value); |
| 286 | } |
| 287 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 288 | #define GTT_RETRY 1000 |
Vladimir Serbinenko | a71bdc3 | 2014-08-30 00:35:39 +0200 | [diff] [blame] | 289 | int gtt_poll(u32 reg, u32 mask, u32 value) |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 290 | { |
Subrata Banik | b1434fc | 2019-03-15 22:20:41 +0530 | [diff] [blame] | 291 | unsigned int try = GTT_RETRY; |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 292 | u32 data; |
| 293 | |
| 294 | while (try--) { |
| 295 | data = gtt_read(reg); |
| 296 | if ((data & mask) == value) |
| 297 | return 1; |
| 298 | udelay(10); |
| 299 | } |
| 300 | |
| 301 | printk(BIOS_ERR, "GT init timeout\n"); |
| 302 | return 0; |
| 303 | } |
| 304 | |
Patrick Rudolph | 19c2ad8 | 2017-06-30 14:52:01 +0200 | [diff] [blame] | 305 | uintptr_t gma_get_gnvs_aslb(const void *gnvs) |
| 306 | { |
| 307 | const global_nvs_t *gnvs_ptr = gnvs; |
| 308 | return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); |
| 309 | } |
| 310 | |
| 311 | void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) |
| 312 | { |
| 313 | global_nvs_t *gnvs_ptr = gnvs; |
| 314 | if (gnvs_ptr) |
| 315 | gnvs_ptr->aslb = aslb; |
| 316 | } |
| 317 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 318 | static void gma_pm_init_pre_vbios(struct device *dev) |
| 319 | { |
| 320 | u32 reg32; |
| 321 | |
| 322 | printk(BIOS_DEBUG, "GT Power Management Init\n"); |
| 323 | |
| 324 | gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 325 | if (!gtt_res || !gtt_res->base) |
| 326 | return; |
| 327 | |
| 328 | if (bridge_silicon_revision() < IVB_STEP_C0) { |
| 329 | /* 1: Enable force wake */ |
| 330 | gtt_write(0xa18c, 0x00000001); |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 331 | gtt_poll(0x130090, (1 << 0), (1 << 0)); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 332 | } else { |
| 333 | gtt_write(0xa180, 1 << 5); |
| 334 | gtt_write(0xa188, 0xffff0001); |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 335 | gtt_poll(0x130040, (1 << 0), (1 << 0)); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 336 | } |
| 337 | |
| 338 | if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) { |
| 339 | /* 1d: Set GTT+0x42004 [15:14]=11 (SnB C1+) */ |
| 340 | reg32 = gtt_read(0x42004); |
| 341 | reg32 |= (1 << 14) | (1 << 15); |
| 342 | gtt_write(0x42004, reg32); |
| 343 | } |
| 344 | |
| 345 | if (bridge_silicon_revision() >= IVB_STEP_A0) { |
| 346 | /* Display Reset Acknowledge Settings */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 347 | reg32 = gtt_read(0x45010); |
| 348 | reg32 |= (1 << 1) | (1 << 0); |
| 349 | gtt_write(0x45010, reg32); |
| 350 | } |
| 351 | |
| 352 | /* 2: Get GT SKU from GTT+0x911c[13] */ |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 353 | reg32 = gtt_read(0x911c); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 354 | if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) { |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 355 | if (reg32 & (1 << 13)) { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 356 | printk(BIOS_DEBUG, "SNB GT1 Power Meter Weights\n"); |
| 357 | gtt_write_powermeter(snb_pm_gt1); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 358 | } else { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 359 | printk(BIOS_DEBUG, "SNB GT2 Power Meter Weights\n"); |
| 360 | gtt_write_powermeter(snb_pm_gt2); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 361 | } |
| 362 | } else { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 363 | u32 unit = MCHBAR32(0x5938) & 0xf; |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 364 | |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 365 | if (reg32 & (1 << 13)) { |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 366 | /* GT1 SKU */ |
| 367 | printk(BIOS_DEBUG, "IVB GT1 Power Meter Weights\n"); |
| 368 | gtt_write_powermeter(ivb_pm_gt1); |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 369 | } else { |
| 370 | /* GT2 SKU */ |
| 371 | u32 tdp = MCHBAR32(0x5930) & 0x7fff; |
| 372 | tdp /= (1 << unit); |
| 373 | |
| 374 | if (tdp <= 17) { |
| 375 | /* <=17W ULV */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 376 | printk(BIOS_DEBUG, "IVB GT2 17W Power Meter Weights\n"); |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 377 | gtt_write_powermeter(ivb_pm_gt2_17w); |
| 378 | } else if ((tdp >= 25) && (tdp <= 35)) { |
| 379 | /* 25W-35W */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 380 | printk(BIOS_DEBUG, "IVB GT2 25W-35W Power Meter Weights\n"); |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 381 | gtt_write_powermeter(ivb_pm_gt2_35w); |
| 382 | } else { |
| 383 | /* All others */ |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 384 | printk(BIOS_DEBUG, "IVB GT2 35W Power Meter Weights\n"); |
Duncan Laurie | 8508cff | 2012-04-12 16:02:43 -0700 | [diff] [blame] | 385 | gtt_write_powermeter(ivb_pm_gt2_35w); |
| 386 | } |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 387 | } |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 388 | } |
| 389 | |
| 390 | /* 3: Gear ratio map */ |
| 391 | gtt_write(0xa004, 0x00000010); |
| 392 | |
| 393 | /* 4: GFXPAUSE */ |
| 394 | gtt_write(0xa000, 0x00070020); |
| 395 | |
| 396 | /* 5: Dynamic EU trip control */ |
| 397 | gtt_write(0xa080, 0x00000004); |
| 398 | |
| 399 | /* 6: ECO bits */ |
| 400 | reg32 = gtt_read(0xa180); |
| 401 | reg32 |= (1 << 26) | (1 << 31); |
| 402 | /* (bit 20=1 for SNB step D1+ / IVB A0+) */ |
| 403 | if (bridge_silicon_revision() >= SNB_STEP_D1) |
| 404 | reg32 |= (1 << 20); |
| 405 | gtt_write(0xa180, reg32); |
| 406 | |
| 407 | /* 6a: for SnB step D2+ only */ |
| 408 | if (((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) && |
| 409 | (bridge_silicon_revision() >= SNB_STEP_D2)) { |
| 410 | reg32 = gtt_read(0x9400); |
| 411 | reg32 |= (1 << 7); |
| 412 | gtt_write(0x9400, reg32); |
| 413 | |
| 414 | reg32 = gtt_read(0x941c); |
| 415 | reg32 &= 0xf; |
| 416 | reg32 |= (1 << 1); |
| 417 | gtt_write(0x941c, reg32); |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 418 | gtt_poll(0x941c, (1 << 1), (0 << 1)); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 419 | } |
| 420 | |
| 421 | if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) { |
| 422 | reg32 = gtt_read(0x907c); |
| 423 | reg32 |= (1 << 16); |
| 424 | gtt_write(0x907c, reg32); |
| 425 | |
| 426 | /* 6b: Clocking reset controls */ |
| 427 | gtt_write(0x9424, 0x00000001); |
| 428 | } else { |
| 429 | /* 6b: Clocking reset controls */ |
| 430 | gtt_write(0x9424, 0x00000000); |
| 431 | } |
| 432 | |
| 433 | /* 7 */ |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 434 | if (gtt_poll(0x138124, (1 << 31), (0 << 31))) { |
| 435 | gtt_write(0x138128, 0x00000029); /* Mailbox Data */ |
| 436 | gtt_write(0x138124, 0x80000004); /* Mailbox Cmd for RC6 VID */ |
| 437 | if (gtt_poll(0x138124, (1 << 31), (0 << 31))) |
| 438 | gtt_write(0x138124, 0x8000000a); |
| 439 | gtt_poll(0x138124, (1 << 31), (0 << 31)); |
| 440 | } |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 441 | |
| 442 | /* 8 */ |
| 443 | gtt_write(0xa090, 0x00000000); /* RC Control */ |
| 444 | gtt_write(0xa098, 0x03e80000); /* RC1e Wake Rate Limit */ |
| 445 | gtt_write(0xa09c, 0x0028001e); /* RC6/6p Wake Rate Limit */ |
| 446 | gtt_write(0xa0a0, 0x0000001e); /* RC6pp Wake Rate Limit */ |
| 447 | gtt_write(0xa0a8, 0x0001e848); /* RC Evaluation Interval */ |
| 448 | gtt_write(0xa0ac, 0x00000019); /* RC Idle Hysteresis */ |
| 449 | |
| 450 | /* 9 */ |
| 451 | gtt_write(0x2054, 0x0000000a); /* Render Idle Max Count */ |
| 452 | gtt_write(0x12054,0x0000000a); /* Video Idle Max Count */ |
| 453 | gtt_write(0x22054,0x0000000a); /* Blitter Idle Max Count */ |
| 454 | |
| 455 | /* 10 */ |
| 456 | gtt_write(0xa0b0, 0x00000000); /* Unblock Ack to Busy */ |
| 457 | gtt_write(0xa0b4, 0x000003e8); /* RC1e Threshold */ |
| 458 | gtt_write(0xa0b8, 0x0000c350); /* RC6 Threshold */ |
| 459 | gtt_write(0xa0bc, 0x000186a0); /* RC6p Threshold */ |
| 460 | gtt_write(0xa0c0, 0x0000fa00); /* RC6pp Threshold */ |
| 461 | |
| 462 | /* 11 */ |
| 463 | gtt_write(0xa010, 0x000f4240); /* RP Down Timeout */ |
| 464 | gtt_write(0xa014, 0x12060000); /* RP Interrupt Limits */ |
| 465 | gtt_write(0xa02c, 0x00015f90); /* RP Up Threshold */ |
| 466 | gtt_write(0xa030, 0x000186a0); /* RP Down Threshold */ |
| 467 | gtt_write(0xa068, 0x000186a0); /* RP Up EI */ |
| 468 | gtt_write(0xa06c, 0x000493e0); /* RP Down EI */ |
| 469 | gtt_write(0xa070, 0x0000000a); /* RP Idle Hysteresis */ |
| 470 | |
| 471 | /* 11a: Enable Render Standby (RC6) */ |
| 472 | if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) { |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 473 | /* |
| 474 | * IvyBridge should also support DeepRenderStandby. |
| 475 | * |
| 476 | * Unfortunately it does not work reliably on all SKUs so |
| 477 | * disable it here and it can be enabled by the kernel. |
| 478 | */ |
| 479 | gtt_write(0xa090, 0x88040000); /* HW RC Control */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 480 | } else { |
| 481 | gtt_write(0xa090, 0x88040000); /* HW RC Control */ |
| 482 | } |
| 483 | |
| 484 | /* 12: Normal Frequency Request */ |
Felix Held | 6b6c94b | 2017-11-25 00:45:23 +0100 | [diff] [blame] | 485 | /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */ |
| 486 | /* only the lower 7 bits are used and shifted left by 25 */ |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 487 | reg32 = MCHBAR32(0x5998); |
| 488 | reg32 >>= 16; |
Felix Held | 6b6c94b | 2017-11-25 00:45:23 +0100 | [diff] [blame] | 489 | reg32 &= 0x7f; |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 490 | reg32 <<= 25; |
| 491 | gtt_write(0xa008, reg32); |
| 492 | |
| 493 | /* 13: RP Control */ |
| 494 | gtt_write(0xa024, 0x00000592); |
| 495 | |
| 496 | /* 14: Enable PM Interrupts */ |
| 497 | gtt_write(0x4402c, 0x03000076); |
| 498 | |
| 499 | /* Clear 0x6c024 [8:6] */ |
| 500 | reg32 = gtt_read(0x6c024); |
| 501 | reg32 &= ~0x000001c0; |
| 502 | gtt_write(0x6c024, reg32); |
Nico Huber | 07e206a | 2016-10-19 15:20:17 +0200 | [diff] [blame] | 503 | |
| 504 | /* Initialize DP buffer translation with recommended defaults */ |
| 505 | gtt_write(0xe4f00, 0x0100030c); |
| 506 | gtt_write(0xe4f04, 0x00b8230c); |
| 507 | gtt_write(0xe4f08, 0x06f8930c); |
| 508 | gtt_write(0xe4f0c, 0x05f8e38e); |
| 509 | gtt_write(0xe4f10, 0x00b8030c); |
| 510 | gtt_write(0xe4f14, 0x0b78830c); |
| 511 | gtt_write(0xe4f18, 0x09f8d3cf); |
| 512 | gtt_write(0xe4f1c, 0x01e8030c); |
| 513 | gtt_write(0xe4f20, 0x09f863cf); |
| 514 | gtt_write(0xe4f24, 0x0ff803cf); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | static void gma_pm_init_post_vbios(struct device *dev) |
| 518 | { |
| 519 | struct northbridge_intel_sandybridge_config *conf = dev->chip_info; |
| 520 | u32 reg32; |
| 521 | |
| 522 | printk(BIOS_DEBUG, "GT Power Management Init (post VBIOS)\n"); |
| 523 | |
| 524 | /* 15: Deassert Force Wake */ |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 525 | if (bridge_silicon_revision() < IVB_STEP_C0) { |
| 526 | gtt_write(0xa18c, gtt_read(0xa18c) & ~1); |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 527 | gtt_poll(0x130090, (1 << 0), (0 << 0)); |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 528 | } else { |
| 529 | gtt_write(0xa188, 0x1fffe); |
Duncan Laurie | da83a5f | 2012-05-25 10:04:17 -0700 | [diff] [blame] | 530 | if (gtt_poll(0x130040, (1 << 0), (0 << 0))) |
| 531 | gtt_write(0xa188, gtt_read(0xa188) | 1); |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 532 | } |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 533 | |
| 534 | /* 16: SW RC Control */ |
| 535 | gtt_write(0xa094, 0x00060000); |
| 536 | |
| 537 | /* Setup Digital Port Hotplug */ |
| 538 | reg32 = gtt_read(0xc4030); |
| 539 | if (!reg32) { |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 540 | reg32 = (conf->gpu_dp_b_hotplug & 0x7) << 2; |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 541 | reg32 |= (conf->gpu_dp_c_hotplug & 0x7) << 10; |
| 542 | reg32 |= (conf->gpu_dp_d_hotplug & 0x7) << 18; |
| 543 | gtt_write(0xc4030, reg32); |
| 544 | } |
| 545 | |
| 546 | /* Setup Panel Power On Delays */ |
| 547 | reg32 = gtt_read(0xc7208); |
| 548 | if (!reg32) { |
| 549 | reg32 = (conf->gpu_panel_port_select & 0x3) << 30; |
| 550 | reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16; |
| 551 | reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff); |
| 552 | gtt_write(0xc7208, reg32); |
| 553 | } |
| 554 | |
| 555 | /* Setup Panel Power Off Delays */ |
| 556 | reg32 = gtt_read(0xc720c); |
| 557 | if (!reg32) { |
| 558 | reg32 = (conf->gpu_panel_power_down_delay & 0x1fff) << 16; |
| 559 | reg32 |= (conf->gpu_panel_power_backlight_off_delay & 0x1fff); |
| 560 | gtt_write(0xc720c, reg32); |
| 561 | } |
| 562 | |
| 563 | /* Setup Panel Power Cycle Delay */ |
| 564 | if (conf->gpu_panel_power_cycle_delay) { |
| 565 | reg32 = gtt_read(0xc7210); |
| 566 | reg32 &= ~0xff; |
| 567 | reg32 |= conf->gpu_panel_power_cycle_delay & 0xff; |
| 568 | gtt_write(0xc7210, reg32); |
| 569 | } |
Duncan Laurie | dd585b8 | 2012-04-09 12:05:18 -0700 | [diff] [blame] | 570 | |
| 571 | /* Enable Backlight if needed */ |
| 572 | if (conf->gpu_cpu_backlight) { |
| 573 | gtt_write(0x48250, (1 << 31)); |
| 574 | gtt_write(0x48254, conf->gpu_cpu_backlight); |
| 575 | } |
| 576 | if (conf->gpu_pch_backlight) { |
| 577 | gtt_write(0xc8250, (1 << 31)); |
| 578 | gtt_write(0xc8254, conf->gpu_pch_backlight); |
| 579 | } |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 580 | } |
| 581 | |
Patrick Rudolph | 76b93fe | 2017-06-20 17:55:40 +0200 | [diff] [blame] | 582 | /* Enable SCI to ACPI _GPE._L06 */ |
| 583 | static void gma_enable_swsci(void) |
| 584 | { |
| 585 | u16 reg16; |
| 586 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 587 | /* Clear DMISCI status */ |
Patrick Rudolph | 76b93fe | 2017-06-20 17:55:40 +0200 | [diff] [blame] | 588 | reg16 = inw(DEFAULT_PMBASE + TCO1_STS); |
| 589 | reg16 &= DMISCI_STS; |
| 590 | outw(DEFAULT_PMBASE + TCO1_STS, reg16); |
| 591 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 592 | /* Clear ACPI TCO status */ |
Patrick Rudolph | 76b93fe | 2017-06-20 17:55:40 +0200 | [diff] [blame] | 593 | outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS); |
| 594 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 595 | /* Enable ACPI TCO SCIs */ |
Patrick Rudolph | 76b93fe | 2017-06-20 17:55:40 +0200 | [diff] [blame] | 596 | reg16 = inw(DEFAULT_PMBASE + GPE0_EN); |
| 597 | reg16 |= TCOSCI_EN; |
| 598 | outw(DEFAULT_PMBASE + GPE0_EN, reg16); |
| 599 | } |
| 600 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 601 | static void gma_func0_init(struct device *dev) |
| 602 | { |
| 603 | u32 reg32; |
| 604 | |
| 605 | /* IGD needs to be Bus Master */ |
| 606 | reg32 = pci_read_config32(dev, PCI_COMMAND); |
| 607 | reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; |
| 608 | pci_write_config32(dev, PCI_COMMAND, reg32); |
| 609 | |
| 610 | /* Init graphics power management */ |
| 611 | gma_pm_init_pre_vbios(dev); |
| 612 | |
Nico Huber | d1b99d2 | 2019-05-30 15:11:42 +0200 | [diff] [blame] | 613 | if (!CONFIG(MAINBOARD_USE_LIBGFXINIT)) |
Alexandru Gagniuc | 9647094 | 2015-09-07 03:06:31 -0700 | [diff] [blame] | 614 | /* PCI Init, will run VBIOS */ |
| 615 | pci_dev_init(dev); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 616 | |
| 617 | /* Post VBIOS init */ |
| 618 | gma_pm_init_post_vbios(dev); |
Ronald G. Minnich | 69efaa0 | 2013-02-26 10:07:40 -0800 | [diff] [blame] | 619 | |
Arthur Heymans | e6c8f7e | 2018-08-09 11:31:51 +0200 | [diff] [blame] | 620 | int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; |
| 621 | |
Patrick Rudolph | de4a1a0 | 2017-06-20 19:13:33 +0200 | [diff] [blame] | 622 | /* Running graphics init on S3 breaks Linux drm driver. */ |
| 623 | if (!acpi_is_wakeup_s3() && |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 624 | CONFIG(MAINBOARD_USE_LIBGFXINIT)) { |
Arthur Heymans | e6c8f7e | 2018-08-09 11:31:51 +0200 | [diff] [blame] | 625 | if (vga_disable) { |
| 626 | printk(BIOS_INFO, |
| 627 | "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); |
Nico Huber | 88c6487 | 2016-10-05 18:02:01 +0200 | [diff] [blame] | 628 | } else { |
Arthur Heymans | e6c8f7e | 2018-08-09 11:31:51 +0200 | [diff] [blame] | 629 | /* This should probably run before post VBIOS init. */ |
| 630 | printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); |
Arthur Heymans | e6c8f7e | 2018-08-09 11:31:51 +0200 | [diff] [blame] | 631 | int lightup_ok; |
Arthur Heymans | a6be58f | 2018-07-18 16:43:43 +0200 | [diff] [blame] | 632 | gma_gfxinit(&lightup_ok); |
Arthur Heymans | e6c8f7e | 2018-08-09 11:31:51 +0200 | [diff] [blame] | 633 | if (lightup_ok) |
| 634 | gfx_set_init_done(1); |
Nico Huber | 88c6487 | 2016-10-05 18:02:01 +0200 | [diff] [blame] | 635 | } |
Alexandru Gagniuc | 9647094 | 2015-09-07 03:06:31 -0700 | [diff] [blame] | 636 | } |
Patrick Rudolph | 76b93fe | 2017-06-20 17:55:40 +0200 | [diff] [blame] | 637 | |
| 638 | gma_enable_swsci(); |
| 639 | intel_gma_restore_opregion(); |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 640 | } |
| 641 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 642 | static void gma_generate_ssdt(const struct device *device) |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 643 | { |
Matt DeVillier | 348f9f0 | 2020-03-30 19:30:18 -0500 | [diff] [blame] | 644 | const struct northbridge_intel_sandybridge_config *chip = device->chip_info; |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 645 | |
Matt DeVillier | 348f9f0 | 2020-03-30 19:30:18 -0500 | [diff] [blame] | 646 | drivers_intel_gma_displays_ssdt_generate(&chip->gfx); |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 647 | } |
| 648 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 649 | static unsigned long gma_write_acpi_tables(const struct device *const dev, |
| 650 | unsigned long current, |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 651 | struct acpi_rsdp *const rsdp) |
Patrick Rudolph | 281ccca | 2017-04-12 16:55:32 +0200 | [diff] [blame] | 652 | { |
Patrick Rudolph | 402e9c1 | 2017-05-18 18:26:30 +0200 | [diff] [blame] | 653 | igd_opregion_t *opregion = (igd_opregion_t *)current; |
Patrick Rudolph | 281ccca | 2017-04-12 16:55:32 +0200 | [diff] [blame] | 654 | global_nvs_t *gnvs; |
| 655 | |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 656 | if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS) |
Patrick Rudolph | 402e9c1 | 2017-05-18 18:26:30 +0200 | [diff] [blame] | 657 | return current; |
| 658 | |
| 659 | current += sizeof(igd_opregion_t); |
| 660 | |
| 661 | /* GNVS has been already set up */ |
| 662 | gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); |
| 663 | if (gnvs) { |
| 664 | /* IGD OpRegion Base Address */ |
Patrick Rudolph | 19c2ad8 | 2017-06-30 14:52:01 +0200 | [diff] [blame] | 665 | gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion); |
Patrick Rudolph | 402e9c1 | 2017-05-18 18:26:30 +0200 | [diff] [blame] | 666 | } else { |
| 667 | printk(BIOS_ERR, "Error: GNVS table not found.\n"); |
Patrick Rudolph | 281ccca | 2017-04-12 16:55:32 +0200 | [diff] [blame] | 668 | } |
| 669 | |
Patrick Rudolph | 402e9c1 | 2017-05-18 18:26:30 +0200 | [diff] [blame] | 670 | current = acpi_align_current(current); |
Patrick Rudolph | 281ccca | 2017-04-12 16:55:32 +0200 | [diff] [blame] | 671 | return current; |
| 672 | } |
| 673 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 674 | static const char *gma_acpi_name(const struct device *dev) |
Patrick Rudolph | 3e47fc9 | 2017-06-07 09:44:07 +0200 | [diff] [blame] | 675 | { |
| 676 | return "GFX0"; |
| 677 | } |
| 678 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 679 | /* Called by PCI set_vga_bridge function */ |
Patrick Rudolph | e11f6c3 | 2015-10-15 15:35:12 +0200 | [diff] [blame] | 680 | static void gma_func0_disable(struct device *dev) |
| 681 | { |
| 682 | u16 reg16; |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 683 | struct device *dev_host = pcidev_on_root(0, 0); |
Patrick Rudolph | e11f6c3 | 2015-10-15 15:35:12 +0200 | [diff] [blame] | 684 | |
| 685 | reg16 = pci_read_config16(dev_host, GGC); |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 686 | reg16 |= (1 << 1); /* Disable VGA decode */ |
Patrick Rudolph | e11f6c3 | 2015-10-15 15:35:12 +0200 | [diff] [blame] | 687 | pci_write_config16(dev_host, GGC, reg16); |
| 688 | |
| 689 | dev->enabled = 0; |
| 690 | } |
| 691 | |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 692 | static struct pci_operations gma_pci_ops = { |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 693 | .set_subsystem = pci_dev_set_subsystem, |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 694 | }; |
| 695 | |
| 696 | static struct device_operations gma_func0_ops = { |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 697 | .read_resources = pci_dev_read_resources, |
| 698 | .set_resources = pci_dev_set_resources, |
| 699 | .enable_resources = pci_dev_enable_resources, |
Matt DeVillier | 348f9f0 | 2020-03-30 19:30:18 -0500 | [diff] [blame] | 700 | .acpi_fill_ssdt = gma_generate_ssdt, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 701 | .init = gma_func0_init, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 702 | .disable = gma_func0_disable, |
| 703 | .ops_pci = &gma_pci_ops, |
| 704 | .acpi_name = gma_acpi_name, |
| 705 | .write_acpi_tables = gma_write_acpi_tables, |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 706 | }; |
| 707 | |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 708 | static const unsigned short pci_device_ids[] = { |
| 709 | 0x0102, 0x0106, 0x010a, 0x0112, |
| 710 | 0x0116, 0x0122, 0x0126, 0x0156, |
| 711 | 0x0166, 0x0162, 0x016a, 0x0152, |
| 712 | 0 |
| 713 | }; |
Ronald G. Minnich | 69efaa0 | 2013-02-26 10:07:40 -0800 | [diff] [blame] | 714 | |
| 715 | static const struct pci_driver gma __pci_driver = { |
Angel Pons | 7c49cb8 | 2020-03-16 23:17:32 +0100 | [diff] [blame] | 716 | .ops = &gma_func0_ops, |
| 717 | .vendor = PCI_VENDOR_ID_INTEL, |
Ronald G. Minnich | 69efaa0 | 2013-02-26 10:07:40 -0800 | [diff] [blame] | 718 | .devices = pci_device_ids, |
Stefan Reinauer | 00636b0 | 2012-04-04 00:08:51 +0200 | [diff] [blame] | 719 | }; |