nb/intel/sandybridge: Tidy up code and comments

- Reformat some lines of code
- Move MCHBAR registers and documentation into a separate file
- Add a few missing macros
- Rename some registers
- Rewrite several comments
- Use C-style comments for consistency
- Rewrite some hex constants
- Use HOST_BRIDGE instead of PCI_DEV(0, 0, 0)

With BUILD_TIMELESS=1, this commit does not change the result of:
- Asus P8Z77-V LX2 with native raminit.
- Asus P8Z77-M PRO with MRC raminit.

Change-Id: I6e113e48afd685ca63cfcb11ff9fcf9df6e41e46
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39599
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index e6dfbc4..f0232e0 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -57,7 +57,7 @@
 	{ 0xa240, 0x00000000 },
 	{ 0xa244, 0x00000000 },
 	{ 0xa248, 0x8000421e },
-	{ 0 }
+	{ 0 },
 };
 
 static const struct gt_powermeter snb_pm_gt2[] = {
@@ -80,7 +80,7 @@
 	{ 0xa240, 0x00000000 },
 	{ 0xa244, 0x00000000 },
 	{ 0xa248, 0x8000421e },
-	{ 0 }
+	{ 0 },
 };
 
 static const struct gt_powermeter ivb_pm_gt1[] = {
@@ -136,7 +136,7 @@
 	{ 0xaa3c, 0x00001c00 },
 	{ 0xaa54, 0x00000004 },
 	{ 0xaa60, 0x00060000 },
-	{ 0 }
+	{ 0 },
 };
 
 static const struct gt_powermeter ivb_pm_gt2_17w[] = {
@@ -192,7 +192,7 @@
 	{ 0xaa3c, 0x00003900 },
 	{ 0xaa54, 0x00000008 },
 	{ 0xaa60, 0x00110000 },
-	{ 0 }
+	{ 0 },
 };
 
 static const struct gt_powermeter ivb_pm_gt2_35w[] = {
@@ -248,12 +248,12 @@
 	{ 0xaa3c, 0x00003900 },
 	{ 0xaa54, 0x00000008 },
 	{ 0xaa60, 0x00110000 },
-	{ 0 }
+	{ 0 },
 };
 
-/* some vga option roms are used for several chipsets but they only have one
- * PCI ID in their header. If we encounter such an option rom, we need to do
- * the mapping ourselves
+/*
+ * Some VGA option roms are used for several chipsets but they only have one PCI ID in their
+ * header. If we encounter such an option rom, we need to do the mapping ourselves.
  */
 
 u32 map_oprom_vendev(u32 vendev)
@@ -262,17 +262,17 @@
 
 	switch (vendev) {
 	case 0x80860102:		/* SNB GT1 Desktop */
-	case 0x8086010a:		/* SNB GT1 Server */
+	case 0x8086010a:		/* SNB GT1 Server  */
 	case 0x80860112:		/* SNB GT2 Desktop */
-	case 0x80860116:		/* SNB GT2 Mobile */
+	case 0x80860116:		/* SNB GT2 Mobile  */
 	case 0x80860122:		/* SNB GT2 Desktop >=1.3GHz */
-	case 0x80860126:		/* SNB GT2 Mobile >=1.3GHz */
+	case 0x80860126:		/* SNB GT2 Mobile  >=1.3GHz */
 	case 0x80860152:		/* IVB GT1 Desktop */
-	case 0x80860156:		/* IVB GT1 Mobile */
+	case 0x80860156:		/* IVB GT1 Mobile  */
 	case 0x80860162:		/* IVB GT2 Desktop */
-	case 0x80860166:		/* IVB GT2 Mobile */
-	case 0x8086016a:		/* IVB GT2 Server */
-		new_vendev = 0x80860106;/* SNB GT1 Mobile */
+	case 0x80860166:		/* IVB GT2 Mobile  */
+	case 0x8086016a:		/* IVB GT2 Server  */
+		new_vendev = 0x80860106;/* SNB GT1 Mobile  */
 		break;
 	}
 
@@ -385,18 +385,15 @@
 
 			if (tdp <= 17) {
 				/* <=17W ULV */
-				printk(BIOS_DEBUG, "IVB GT2 17W "
-				       "Power Meter Weights\n");
+				printk(BIOS_DEBUG, "IVB GT2 17W Power Meter Weights\n");
 				gtt_write_powermeter(ivb_pm_gt2_17w);
 			} else if ((tdp >= 25) && (tdp <= 35)) {
 				/* 25W-35W */
-				printk(BIOS_DEBUG, "IVB GT2 25W-35W "
-				       "Power Meter Weights\n");
+				printk(BIOS_DEBUG, "IVB GT2 25W-35W Power Meter Weights\n");
 				gtt_write_powermeter(ivb_pm_gt2_35w);
 			} else {
 				/* All others */
-				printk(BIOS_DEBUG, "IVB GT2 35W "
-				       "Power Meter Weights\n");
+				printk(BIOS_DEBUG, "IVB GT2 35W Power Meter Weights\n");
 				gtt_write_powermeter(ivb_pm_gt2_35w);
 			}
 		}
@@ -552,7 +549,7 @@
 	/* Setup Digital Port Hotplug */
 	reg32 = gtt_read(0xc4030);
 	if (!reg32) {
-		reg32 = (conf->gpu_dp_b_hotplug & 0x7) << 2;
+		reg32  = (conf->gpu_dp_b_hotplug & 0x7) <<  2;
 		reg32 |= (conf->gpu_dp_c_hotplug & 0x7) << 10;
 		reg32 |= (conf->gpu_dp_d_hotplug & 0x7) << 18;
 		gtt_write(0xc4030, reg32);
@@ -599,15 +596,15 @@
 {
 	u16 reg16;
 
-	/* clear DMISCI status */
+	/* Clear DMISCI status */
 	reg16 = inw(DEFAULT_PMBASE + TCO1_STS);
 	reg16 &= DMISCI_STS;
 	outw(DEFAULT_PMBASE + TCO1_STS, reg16);
 
-	/* clear acpi tco status */
+	/* Clear ACPI TCO status */
 	outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS);
 
-	/* enable acpi tco scis */
+	/* Enable ACPI TCO SCIs */
 	reg16 = inw(DEFAULT_PMBASE + GPE0_EN);
 	reg16 |= TCOSCI_EN;
 	outw(DEFAULT_PMBASE + GPE0_EN, reg16);
@@ -654,10 +651,9 @@
 	intel_gma_restore_opregion();
 }
 
-const struct i915_gpu_controller_info *
-intel_gma_get_controller_info(void)
+const struct i915_gpu_controller_info *intel_gma_get_controller_info(void)
 {
-	struct device *dev = pcidev_on_root(0x2, 0);
+	struct device *dev = pcidev_on_root(2, 0);
 	if (!dev) {
 		return NULL;
 	}
@@ -675,10 +671,8 @@
 	drivers_intel_gma_displays_ssdt_generate(gfx);
 }
 
-static unsigned long
-gma_write_acpi_tables(struct device *const dev,
-		      unsigned long current,
-		      struct acpi_rsdp *const rsdp)
+static unsigned long gma_write_acpi_tables(struct device *const dev, unsigned long current,
+					   struct acpi_rsdp *const rsdp)
 {
 	igd_opregion_t *opregion = (igd_opregion_t *)current;
 	global_nvs_t *gnvs;
@@ -706,44 +700,46 @@
 	return "GFX0";
 }
 
-/* called by pci set_vga_bridge function */
+/* Called by PCI set_vga_bridge function */
 static void gma_func0_disable(struct device *dev)
 {
 	u16 reg16;
 	struct device *dev_host = pcidev_on_root(0, 0);
 
 	reg16 = pci_read_config16(dev_host, GGC);
-	reg16 |= (1 << 1); /* disable VGA decode */
+	reg16 |= (1 << 1); /* Disable VGA decode */
 	pci_write_config16(dev_host, GGC, reg16);
 
 	dev->enabled = 0;
 }
 
 static struct pci_operations gma_pci_ops = {
-	.set_subsystem    = pci_dev_set_subsystem,
+	.set_subsystem = pci_dev_set_subsystem,
 };
 
 static struct device_operations gma_func0_ops = {
-	.read_resources		= pci_dev_read_resources,
-	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= pci_dev_enable_resources,
+	.read_resources           = pci_dev_read_resources,
+	.set_resources            = pci_dev_set_resources,
+	.enable_resources         = pci_dev_enable_resources,
 	.acpi_fill_ssdt_generator = gma_ssdt,
-	.init			= gma_func0_init,
-	.scan_bus		= 0,
-	.enable			= 0,
-	.disable		= gma_func0_disable,
-	.ops_pci		= &gma_pci_ops,
-	.acpi_name		= gma_acpi_name,
-	.write_acpi_tables	= gma_write_acpi_tables,
+	.init                     = gma_func0_init,
+	.scan_bus                 = NULL,
+	.enable                   = NULL,
+	.disable                  = gma_func0_disable,
+	.ops_pci                  = &gma_pci_ops,
+	.acpi_name                = gma_acpi_name,
+	.write_acpi_tables        = gma_write_acpi_tables,
 };
 
-static const unsigned short pci_device_ids[] = { 0x0102, 0x0106, 0x010a, 0x0112,
-						 0x0116, 0x0122, 0x0126, 0x0156,
-						 0x0166, 0x0162, 0x016a, 0x0152,
-						 0 };
+static const unsigned short pci_device_ids[] = {
+	0x0102, 0x0106, 0x010a, 0x0112,
+	0x0116, 0x0122, 0x0126, 0x0156,
+	0x0166, 0x0162, 0x016a, 0x0152,
+	0
+};
 
 static const struct pci_driver gma __pci_driver = {
-	.ops	 = &gma_func0_ops,
-	.vendor	 = PCI_VENDOR_ID_INTEL,
+	.ops     = &gma_func0_ops,
+	.vendor  = PCI_VENDOR_ID_INTEL,
 	.devices = pci_device_ids,
 };