blob: 2dd094908e87aa36d53839283ca33566f940cf9c [file] [log] [blame]
Tim Wawrzynczak64246482021-06-25 22:44:45 -06001/* SPDX-License-Identifier: GPL-2.0-or-later */
2
Elyes Haouas8ed58352022-10-22 22:17:28 +02003#include <acpi/acpi.h>
Tim Wawrzynczak64246482021-06-25 22:44:45 -06004#include <acpi/acpigen.h>
Tim Wawrzynczak35730382021-09-14 11:54:47 -06005#include <assert.h>
Elyes Haouas8ed58352022-10-22 22:17:28 +02006#include <commonlib/bsd/helpers.h>
Tim Wawrzynczak64246482021-06-25 22:44:45 -06007#include <console/console.h>
8#include <intelblocks/acpi.h>
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -06009#include <intelblocks/pmc_ipc.h>
10#include <stdlib.h>
Elyes Haouas8ed58352022-10-22 22:17:28 +020011#include <string.h>
Tim Wawrzynczak64246482021-06-25 22:44:45 -060012#include <types.h>
13
14#define LPI_S0_HELPER_UUID "c4eb40a0-6cd2-11e2-bcfd-0800200c9a66"
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -060015#define PEP_S0IX_UUID "57a6512e-3979-4e9d-9708-ff13b2508972"
Tim Wawrzynczak64246482021-06-25 22:44:45 -060016#define SYSTEM_POWER_MANAGEMENT_HID "INT33A1"
17#define SYSTEM_POWER_MANAGEMENT_CID "PNP0D80"
18#define EC_S0IX_HOOK "\\_SB.PCI0.LPCB.EC0.S0IX"
Michael Niewöhnera972e232022-05-18 22:27:13 +020019#define EC_DISPLAY_HOOK "\\_SB.PCI0.LPCB.EC0.EDSX"
Tim Wawrzynczak64246482021-06-25 22:44:45 -060020#define MAINBOARD_HOOK "\\_SB.MS0X"
Michał Żygowski2b87b502022-02-22 12:36:32 +010021#define MAINBOARD_DISPLAY_HOOK "\\_SB.MDSX"
Tim Wawrzynczak64246482021-06-25 22:44:45 -060022#define ENABLE_PM_BITS_HOOK "\\_SB.PCI0.EGPM"
23#define RESTORE_PM_BITS_HOOK "\\_SB.PCI0.RGPM"
Michał Kopeć86221c62022-05-02 10:24:41 +020024#define THUNDERBOLT_DEVICE "\\_SB.PCI0.TXHC"
25#define THUNDERBOLT_IOM_DPOF "\\_SB.PCI0.DPOF"
Tim Wawrzynczak64246482021-06-25 22:44:45 -060026#define PEPD_SCOPE "\\_SB.PCI0"
27
Eran Mitrani4c9440c2022-11-29 17:46:38 -080028#define MIN_DEVICE_STATE ACPI_DEVICE_SLEEP_D0
29#define LPI_STATES_ALL 0xff
30
31enum {
32 LPI_REVISION_0 = 0,
33};
34
35enum {
36 LPI_DISABLED = 0,
37 LPI_ENABLED = 1,
38};
39
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -060040struct reg_info {
41 uint8_t *addr;
42 size_t buffer_size;
43};
44
45static void read_pmc_lpm_requirements(const struct soc_pmc_lpm *lpm,
46 struct reg_info *info)
47{
Tim Wawrzynczak35730382021-09-14 11:54:47 -060048 assert(info);
49
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -060050 if (!CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ) || !lpm) {
51 memset(info, 0, sizeof(*info));
52 return;
53 }
54
55 const size_t register_count = lpm->num_substates * lpm->num_req_regs;
56 uint32_t *reg = calloc(register_count, sizeof(uint32_t));
57
58 /* Read the various LPM state requirement registers from the PMC */
59 for (size_t i = 0; i < lpm->num_substates; i++) {
60 if (!(lpm->lpm_enable_mask & BIT(i)))
61 continue;
62
63 for (size_t j = 0; j < lpm->num_req_regs; j++) {
64 const uint32_t offset = lpm->lpm_ipc_offset +
65 i * lpm->req_reg_stride +
66 j * sizeof(uint32_t);
Ethan Tsaoeaf71b02021-10-13 12:37:05 -070067 const uint32_t cmd_reg = pmc_make_ipc_cmd(PMC_IPC_CMD_RD_PMC_REG,
68 PMC_IPC_CMD_SUBCMD_RD_PMC_REG, 0);
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -060069 struct pmc_ipc_buffer req = {.buf[0] = offset};
70 struct pmc_ipc_buffer res = {};
71
72 enum cb_err result = pmc_send_ipc_cmd(cmd_reg, &req, &res);
73 if (result != CB_SUCCESS) {
74 printk(BIOS_ERR, "Failed to retrieve LPM substate registers"
Paul Menzel5ca00152021-11-09 21:56:09 +010075 "from LPM, substate %zu, reg %zu\n", i, j);
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -060076 }
77
78 uint32_t *ptr = reg + i * lpm->num_req_regs + j;
79 *ptr = res.buf[0];
80 }
81 }
82
Tim Wawrzynczak35730382021-09-14 11:54:47 -060083 info->addr = (uint8_t *)reg;
84 info->buffer_size = register_count * sizeof(uint32_t);
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -060085}
86
Tim Wawrzynczak64246482021-06-25 22:44:45 -060087/*
Tim Wawrzynczak7a94ad72022-02-11 09:46:15 -070088 * Windows expects a non-empty package for this subfunction, otherwise it
89 * results in a bluescreen (`INTERNAL_POWER_ERROR`); returning an empty package
90 * does not work. To workaround this, return a package describing a single
91 * device, one that is known to exist, i.e. ACPI_CPU_STRING. expects at least
92 * one device and crashes without it with a bluescreen.
Tim Wawrzynczak64246482021-06-25 22:44:45 -060093 */
Eran Mitrani4c9440c2022-11-29 17:46:38 -080094static void acpi_gen_default_lpi_constraints(void)
Tim Wawrzynczak64246482021-06-25 22:44:45 -060095{
Tim Wawrzynczak7a94ad72022-02-11 09:46:15 -070096 char path[16];
Tarun Tulic66ea982022-05-03 20:35:47 +000097 printk(BIOS_INFO, "Returning default LPI constraint package\n");
Tim Wawrzynczak7a94ad72022-02-11 09:46:15 -070098
Tim Wawrzynczak64246482021-06-25 22:44:45 -060099 /*
100 * Return (Package() {
Tim Wawrzynczak7a94ad72022-02-11 09:46:15 -0700101 * Package() { "\_SB.CP00", 0,
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600102 * Package() { 0,
103 * Package() { 0xff, 0 }}}})
104 */
105 acpigen_emit_byte(RETURN_OP);
106 acpigen_write_package(1);
107 {
108 acpigen_write_package(3);
109 {
Tim Wawrzynczak7a94ad72022-02-11 09:46:15 -0700110 snprintf(path, sizeof(path), CONFIG_ACPI_CPU_STRING, 0);
111 acpigen_emit_namestring(path);
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600112 acpigen_write_integer(0); /* device disabled */
113 acpigen_write_package(2);
114 {
115 acpigen_write_integer(0); /* revision */
116 acpigen_write_package(2);
117 {
118 acpigen_write_integer(LPI_STATES_ALL);
119 acpigen_write_integer(MIN_DEVICE_STATE);
120 }
121 acpigen_write_package_end();
122 }
123 acpigen_write_package_end();
124 }
125 acpigen_write_package_end();
126 }
127 acpigen_write_package_end();
128}
129
Eran Mitrani4c9440c2022-11-29 17:46:38 -0800130__weak struct min_sleep_state *soc_get_min_sleep_state_array(size_t *size)
131{
132 printk(BIOS_DEBUG, "Empty min sleep state array returned\n");
133 *size = 0;
134 return NULL;
135}
136
137static enum acpi_device_sleep_states get_min_sleep_state(
138 const struct device *dev, struct min_sleep_state *states_arr, size_t size)
139{
140 if (!is_dev_enabled(dev))
141 return ACPI_DEVICE_SLEEP_NONE;
142 switch (dev->path.type) {
143 case DEVICE_PATH_APIC:
144 return MIN_DEVICE_STATE;
145
146 case DEVICE_PATH_PCI:
147 /* skip external buses*/
148 if ((dev->bus->secondary != 0) || (!states_arr))
149 return ACPI_DEVICE_SLEEP_NONE;
150 for (size_t i = 0; i < size; i++)
151 if (states_arr[i].pci_dev == dev->path.pci.devfn)
152 return states_arr[i].min_sleep_state;
153 printk(BIOS_WARNING, "Unknown min d_state for %x\n", dev->path.pci.devfn);
154 return ACPI_DEVICE_SLEEP_NONE;
155
156 default:
157 return ACPI_DEVICE_SLEEP_NONE;
158 }
159}
160
161/* Generate the LPI constraint table */
162static void acpi_lpi_get_constraints(void *unused)
163{
164 unsigned int num_entries = 0;
165 const struct device *dev;
166 enum acpi_device_sleep_states min_sleep_state;
167 size_t size;
168 struct min_sleep_state *states_arr = soc_get_min_sleep_state_array(&size);
169
170 if (size && states_arr) {
171 for (dev = all_devices; dev; dev = dev->next) {
172 if (get_min_sleep_state(dev, states_arr, size)
173 != ACPI_DEVICE_SLEEP_NONE)
174 num_entries++;
175 }
176 }
177 if (!num_entries) {
178 acpi_gen_default_lpi_constraints();
179 } else {
180 acpigen_emit_byte(RETURN_OP);
181 acpigen_write_package(num_entries);
182
183 size_t cpu_index = 0;
184 for (dev = all_devices; dev; dev = dev->next) {
185 min_sleep_state = get_min_sleep_state(dev, states_arr, size);
186 if (min_sleep_state == ACPI_DEVICE_SLEEP_NONE)
187 continue;
188
189 acpigen_write_package(3);
190 {
191 char path[32] = { 0 };
192 /* Emit the device path */
193 switch (dev->path.type) {
194 case DEVICE_PATH_PCI:
195 acpigen_emit_namestring(acpi_device_path(dev));
196 break;
197
198 case DEVICE_PATH_APIC:
199 snprintf(path, sizeof(path), CONFIG_ACPI_CPU_STRING,
200 cpu_index++);
201 acpigen_emit_namestring(path);
202 break;
203
204 default:
205 /* Unhandled */
206 printk(BIOS_WARNING,
207 "Unhandled device path type %d\n",
208 dev->path.type);
209 acpigen_emit_namestring(NULL);
210 break;
211 }
212
213 acpigen_write_integer(LPI_ENABLED);
214 acpigen_write_package(2);
215 {
216 acpigen_write_integer(LPI_REVISION_0);
217 acpigen_write_package(2); /* no optional device info */
218 {
219 /* Assume constraints apply to all entries */
220 acpigen_write_integer(LPI_STATES_ALL);
221 /* min D-state */
222 acpigen_write_integer(min_sleep_state);
223 }
224 acpigen_write_package_end();
225 }
226 acpigen_write_package_end();
227 }
228 acpigen_write_package_end();
229 }
230 acpigen_write_package_end();
231 }
232}
233
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600234static void lpi_s0ix_entry(void *unused)
235{
236 /* Inform the EC */
237 acpigen_write_if_cond_ref_of(EC_S0IX_HOOK);
238 acpigen_emit_namestring(EC_S0IX_HOOK);
239 acpigen_write_integer(1);
240 acpigen_write_if_end();
241
242 /* Provide a board level S0ix hook */
243 acpigen_write_if_cond_ref_of(MAINBOARD_HOOK);
244 acpigen_emit_namestring(MAINBOARD_HOOK);
245 acpigen_write_integer(1);
246 acpigen_write_if_end();
247
248 /* Save the current PM bits then enable GPIO PM with
249 MISCCFG_GPIO_PM_CONFIG_BITS */
250 acpigen_write_if_cond_ref_of(ENABLE_PM_BITS_HOOK);
251 acpigen_emit_namestring(ENABLE_PM_BITS_HOOK);
252 acpigen_write_if_end();
Michał Kopeć86221c62022-05-02 10:24:41 +0200253
254 /* Handle Thunderbolt displays */
255 acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE);
256 acpigen_write_store_int_to_namestr(1, THUNDERBOLT_IOM_DPOF);
257 acpigen_write_if_end();
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600258}
259
260static void lpi_s0ix_exit(void *unused)
261{
262 /* Inform the EC */
263 acpigen_write_if_cond_ref_of(EC_S0IX_HOOK);
264 acpigen_emit_namestring(EC_S0IX_HOOK);
265 acpigen_write_integer(0);
266 acpigen_write_if_end();
267
268 /* Provide a board level S0ix hook */
269 acpigen_write_if_cond_ref_of(MAINBOARD_HOOK);
270 acpigen_emit_namestring(MAINBOARD_HOOK);
271 acpigen_write_integer(0);
272 acpigen_write_if_end();
273
274 /* Restore GPIO all Community PM */
275 acpigen_write_if_cond_ref_of(RESTORE_PM_BITS_HOOK);
276 acpigen_emit_namestring(RESTORE_PM_BITS_HOOK);
277 acpigen_write_if_end();
Michał Kopeć86221c62022-05-02 10:24:41 +0200278
279 /* Handle Thunderbolt displays */
280 acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE);
281 acpigen_write_store_int_to_namestr(0, THUNDERBOLT_IOM_DPOF);
282 acpigen_write_if_end();
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600283}
284
Michał Żygowski2b87b502022-02-22 12:36:32 +0100285static void lpi_display_on(void *unused)
286{
Michael Niewöhnera972e232022-05-18 22:27:13 +0200287 /* Inform the EC */
288 acpigen_write_if_cond_ref_of(EC_DISPLAY_HOOK);
289 acpigen_emit_namestring(EC_DISPLAY_HOOK);
290 acpigen_write_integer(1);
291 acpigen_write_if_end();
292
Michał Żygowski2b87b502022-02-22 12:36:32 +0100293 /* Provide a board level S0ix hook */
294 acpigen_write_if_cond_ref_of(MAINBOARD_DISPLAY_HOOK);
295 acpigen_emit_namestring(MAINBOARD_DISPLAY_HOOK);
296 acpigen_write_integer(1);
297 acpigen_write_if_end();
298}
299
300static void lpi_display_off(void *unused)
301{
Michael Niewöhnera972e232022-05-18 22:27:13 +0200302 /* Inform the EC */
303 acpigen_write_if_cond_ref_of(EC_DISPLAY_HOOK);
304 acpigen_emit_namestring(EC_DISPLAY_HOOK);
305 acpigen_write_integer(0);
306 acpigen_write_if_end();
307
Michał Żygowski2b87b502022-02-22 12:36:32 +0100308 /* Provide a board level S0ix hook */
309 acpigen_write_if_cond_ref_of(MAINBOARD_DISPLAY_HOOK);
310 acpigen_emit_namestring(MAINBOARD_DISPLAY_HOOK);
311 acpigen_write_integer(0);
312 acpigen_write_if_end();
313}
314
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600315static void (*lpi_s0_helpers[])(void *) = {
316 NULL, /* enumerate functions (autogenerated) */
Eran Mitrani4c9440c2022-11-29 17:46:38 -0800317 acpi_lpi_get_constraints,/* get device constraints */
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600318 NULL, /* get crash dump device */
Michał Żygowski2b87b502022-02-22 12:36:32 +0100319 lpi_display_off, /* display off notify */
320 lpi_display_on, /* display on notify */
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600321 lpi_s0ix_entry, /* s0ix entry */
322 lpi_s0ix_exit, /* s0ix exit */
323};
324
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -0600325static void pep_s0ix_return_lpm_requirements(void *arg)
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600326{
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -0600327 if (!CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ)) {
328 acpigen_write_return_singleton_buffer(0x0);
329 return;
330 }
331
332 struct reg_info *info = (struct reg_info *)arg;
333 acpigen_write_return_byte_buffer(info->addr, info->buffer_size);
334}
335
336static void (*pep_s0ix[])(void *) = {
337 NULL, /* enumerate functions (autogenerated) */
338 pep_s0ix_return_lpm_requirements, /* Return LPM requirements */
339};
340
341void generate_acpi_power_engine_with_lpm(const struct soc_pmc_lpm *lpm)
342{
343 struct reg_info info;
344 size_t uuid_count = 1;
345 struct dsm_uuid ids[] = {
346 DSM_UUID(LPI_S0_HELPER_UUID, lpi_s0_helpers, ARRAY_SIZE(lpi_s0_helpers), NULL),
347 DSM_UUID(PEP_S0IX_UUID, pep_s0ix, ARRAY_SIZE(pep_s0ix), &info),
348 };
349
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600350 acpigen_write_scope(PEPD_SCOPE);
351 acpigen_write_device("PEPD");
352
353 acpigen_write_name_string("_HID", SYSTEM_POWER_MANAGEMENT_HID);
354 acpigen_write_name("_CID");
355 acpigen_emit_eisaid(SYSTEM_POWER_MANAGEMENT_CID);
356
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -0600357 read_pmc_lpm_requirements(lpm, &info);
358 if (info.buffer_size)
359 uuid_count++;
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600360
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -0600361 acpigen_write_dsm_uuid_arr(ids, uuid_count);
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600362 acpigen_write_device_end();
363 acpigen_write_scope_end();
364
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -0600365 free(info.addr);
Tim Wawrzynczak64246482021-06-25 22:44:45 -0600366 printk(BIOS_INFO, PEPD_SCOPE ".PEPD: Intel Power Engine Plug-in\n");
367}
Tim Wawrzynczak2eb100d2021-07-01 08:20:17 -0600368
369void generate_acpi_power_engine(void)
370{
371 generate_acpi_power_engine_with_lpm(NULL);
372}