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Martin Roth3c963d92022-10-06 16:29:07 -06001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <console/console.h>
4#include <device/i2c_simple.h>
Elyes Haouas9aebc192023-01-30 20:02:03 +01005#include <gpio.h>
Martin Roth3c963d92022-10-06 16:29:07 -06006#include <soc/platform_descriptors.h>
Fred Reitbergerc7068802022-11-16 13:15:43 -05007#include <soc/soc_util.h>
Martin Roth3c963d92022-10-06 16:29:07 -06008#include <types.h>
9
Fred Reitbergerc7068802022-11-16 13:15:43 -050010#define phx_mxm_dxio_descriptor { \
11 .engine_type = PCIE_ENGINE, \
12 .port_present = CONFIG(ENABLE_EVAL_CARD), \
Felix Held4c548912023-04-05 19:57:44 +020013 .start_lane = 0, \
14 .end_lane = 7, \
Fred Reitbergerc7068802022-11-16 13:15:43 -050015 .device_number = 1, \
16 .function_number = 1, \
17 .link_speed_capability = GEN3, \
18 .turn_off_unused_lanes = true, \
19 .link_aspm = ASPM_L1, \
20 .link_hotplug = 0, \
21 .clk_req = CLK_REQ0, \
22}
Martin Roth3c963d92022-10-06 16:29:07 -060023
Fred Reitbergerc7068802022-11-16 13:15:43 -050024/* TODO: verify on hardware */
25#define phx2_mxm_dxio_descriptor { \
26 .engine_type = PCIE_ENGINE, \
27 .port_present = CONFIG(ENABLE_EVAL_CARD), \
Felix Held4c548912023-04-05 19:57:44 +020028 .start_lane = 0, \
29 .end_lane = 3, \
Fred Reitbergerc7068802022-11-16 13:15:43 -050030 .device_number = 1, \
31 .function_number = 1, \
32 .link_speed_capability = GEN3, \
33 .turn_off_unused_lanes = true, \
34 .link_aspm = ASPM_L1, \
35 .link_hotplug = 0, \
36 .clk_req = CLK_REQ0, \
37}
38
39#define phx_ssd1_dxio_descriptor { \
40 .engine_type = PCIE_ENGINE, \
41 .port_present = !CONFIG(DISABLE_DT_M2), \
Felix Held4c548912023-04-05 19:57:44 +020042 .start_lane = 8, \
43 .end_lane = 11, \
Fred Reitbergerc7068802022-11-16 13:15:43 -050044 .device_number = 1, \
45 .function_number = 2, \
46 .link_speed_capability = GEN3, \
47 .turn_off_unused_lanes = true, \
48 .link_aspm = ASPM_L1, \
49 .link_hotplug = 0, \
50 .clk_req = CLK_REQ1, \
51}
52
53/* TODO: verify on hardware */
54#define phx2_ssd1_dxio_descriptor { \
55 .engine_type = PCIE_ENGINE, \
56 .port_present = true, \
Felix Held4c548912023-04-05 19:57:44 +020057 .start_lane = 8, \
58 .end_lane = 9, \
Fred Reitbergerc7068802022-11-16 13:15:43 -050059 .device_number = 1, \
60 .function_number = 2, \
61 .link_speed_capability = GEN3, \
62 .turn_off_unused_lanes = true, \
63 .link_aspm = ASPM_L1, \
64 .link_hotplug = 0, \
65 .clk_req = CLK_REQ1, \
66}
67
68#define gbe_dxio_descriptor { \
69 .engine_type = PCIE_ENGINE, \
70 .port_present = true, \
Felix Held4c548912023-04-05 19:57:44 +020071 .start_lane = 12, \
72 .end_lane = 12, \
Fred Reitbergerc7068802022-11-16 13:15:43 -050073 .device_number = 1, \
74 .function_number = 3, \
75 .link_speed_capability = GEN3, \
76 .turn_off_unused_lanes = true, \
77 .link_aspm = ASPM_L1, \
78 .link_hotplug = 0, \
79 .clk_req = CLK_REQ6, \
80}
81
82#define sd_dxio_descriptor { \
83 .engine_type = PCIE_ENGINE, \
84 .port_present = true, \
Felix Held4c548912023-04-05 19:57:44 +020085 .start_lane = 13, \
86 .end_lane = 13, \
Fred Reitbergerc7068802022-11-16 13:15:43 -050087 .device_number = 2, \
88 .function_number = 1, \
89 .link_speed_capability = GEN3, \
90 .turn_off_unused_lanes = true, \
91 .link_aspm = ASPM_L1, \
92 .link_hotplug = 0, \
93 .clk_req = CLK_REQ5, \
94}
95
96#define wwan_dxio_descriptor { \
97 .engine_type = PCIE_ENGINE, \
98 .port_present = true, \
Felix Held4c548912023-04-05 19:57:44 +020099 .start_lane = 14, \
100 .end_lane = CONFIG(WWAN01) ? 15 : 14, \
Fred Reitbergerc7068802022-11-16 13:15:43 -0500101 .device_number = 2, \
102 .function_number = 2, \
103 .link_speed_capability = GEN3, \
104 .turn_off_unused_lanes = true, \
105 .link_aspm = ASPM_L1, \
106 .link_hotplug = 0, \
107 .clk_req = CLK_REQ4, \
108}
109
110#define wlan_dxio_descriptor { \
111 .engine_type = PCIE_ENGINE, \
112 .port_present = true, \
Felix Held4c548912023-04-05 19:57:44 +0200113 .start_lane = 15, \
114 .end_lane = CONFIG(WLAN01) ? 14 : 15, \
Fred Reitbergerc7068802022-11-16 13:15:43 -0500115 .device_number = 2, \
116 .function_number = 3, \
117 .link_speed_capability = GEN3, \
118 .turn_off_unused_lanes = true, \
119 .link_aspm = ASPM_L1, \
120 .link_hotplug = 0, \
121 .clk_req = CLK_REQ3, \
122}
123
124#define ssd0_dxio_descriptor { \
125 .engine_type = PCIE_ENGINE, \
126 .port_present = true, \
Felix Held4c548912023-04-05 19:57:44 +0200127 .start_lane = 16, \
128 .end_lane = 19, \
Fred Reitbergerc7068802022-11-16 13:15:43 -0500129 .device_number = 2, \
130 .function_number = 4, \
131 .link_speed_capability = GEN3, \
132 .turn_off_unused_lanes = true, \
133 .link_aspm = ASPM_L1, \
134 .link_hotplug = 0, \
135 .clk_req = CLK_REQ2, \
136}
Martin Roth3c963d92022-10-06 16:29:07 -0600137
138static fsp_ddi_descriptor birman_ddi_descriptors[] = {
139 { /* DDI0 - eDP */
140 .connector_type = DDI_EDP,
141 .aux_index = DDI_AUX1,
142 .hdp_index = DDI_HDP1
143 },
144 { /* DDI1 - HDMI/DP */
145 .connector_type = DDI_HDMI,
146 .aux_index = DDI_AUX2,
147 .hdp_index = DDI_HDP2
148 },
149 { /* DDI2 - DP (type C) */
Felix Held46a97202023-04-11 15:11:16 +0200150 .connector_type = DDI_DP_W_TYPEC,
Martin Roth3c963d92022-10-06 16:29:07 -0600151 .aux_index = DDI_AUX3,
152 .hdp_index = DDI_HDP3,
153 },
154 { /* DDI3 - DP (type C) */
Felix Held46a97202023-04-11 15:11:16 +0200155 .connector_type = DDI_DP_W_TYPEC,
Martin Roth3c963d92022-10-06 16:29:07 -0600156 .aux_index = DDI_AUX4,
157 .hdp_index = DDI_HDP4,
158 },
Felix Held46a97202023-04-11 15:11:16 +0200159 { /* DDI4 - DP (type C) */
160 .connector_type = DDI_DP_W_TYPEC,
Martin Roth3c963d92022-10-06 16:29:07 -0600161 .aux_index = DDI_AUX5,
162 .hdp_index = DDI_HDP5,
163 }
164};
165
166static uint8_t get_ddi1_type(void)
167{
168 const uint8_t eeprom_i2c_bus = 2;
169 const uint8_t eeprom_i2c_address = 0x55;
170 const uint16_t eeprom_connector_type_offset = 2;
171 uint8_t eeprom_connector_type_data[2];
172 uint16_t connector_type;
173
174 if (i2c_2ba_read_bytes(eeprom_i2c_bus, eeprom_i2c_address,
175 eeprom_connector_type_offset, eeprom_connector_type_data,
176 sizeof(eeprom_connector_type_data))) {
177 printk(BIOS_NOTICE,
178 "Display connector type couldn't be determined. Disabling DDI1.\n");
179 return DDI_UNUSED_TYPE;
180 }
181
182 connector_type = eeprom_connector_type_data[1] | eeprom_connector_type_data[0] << 8;
183
184 switch (connector_type) {
Fred Reitbergerb607c6d2023-03-29 12:59:14 -0400185 case 0x0c:
Martin Roth3c963d92022-10-06 16:29:07 -0600186 printk(BIOS_DEBUG, "Configuring DDI1 as HDMI.\n");
187 return DDI_HDMI;
Martin Roth3c963d92022-10-06 16:29:07 -0600188 case 0x13:
189 printk(BIOS_DEBUG, "Configuring DDI1 as DP.\n");
190 return DDI_DP;
Martin Roth3c963d92022-10-06 16:29:07 -0600191 case 0x14:
192 printk(BIOS_DEBUG, "Configuring DDI1 as eDP.\n");
193 return DDI_EDP;
Fred Reitbergerb607c6d2023-03-29 12:59:14 -0400194 case 0x17:
195 printk(BIOS_DEBUG, "Configuring DDI1 as USB-C.\n");
196 return DDI_DP_W_TYPEC;
Martin Roth3c963d92022-10-06 16:29:07 -0600197 default:
198 printk(BIOS_WARNING, "Unexpected display connector type %x. Disabling DDI1.\n",
199 connector_type);
200 return DDI_UNUSED_TYPE;
201 }
202}
203
204void mainboard_get_dxio_ddi_descriptors(
205 const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
206 const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
207{
208 birman_ddi_descriptors[1].connector_type = get_ddi1_type();
209
Fred Reitbergerc7068802022-11-16 13:15:43 -0500210 enum soc_type type = get_soc_type();
211
212 if (type == SOC_PHOENIX) {
213 printk(BIOS_DEBUG, "Using PHX DXIO\n");
214 static const fsp_dxio_descriptor birman_phx_dxio_descriptors[] = {
215 phx_mxm_dxio_descriptor,
216 phx_ssd1_dxio_descriptor,
217 gbe_dxio_descriptor,
218 sd_dxio_descriptor,
219#if CONFIG(WLAN0_WWAN0) || CONFIG(WWAN01)
220 wwan_dxio_descriptor,
221#endif
222#if CONFIG(WLAN0_WWAN0) || CONFIG(WLAN01)
223 wlan_dxio_descriptor,
224#endif
225 ssd0_dxio_descriptor,
226 };
227 *dxio_descs = birman_phx_dxio_descriptors;
228 *dxio_num = ARRAY_SIZE(birman_phx_dxio_descriptors);
229 } else {
230 printk(BIOS_DEBUG, "Using PHX2 DXIO\n");
231 static const fsp_dxio_descriptor birman_phx2_dxio_descriptors[] = {
232 phx2_mxm_dxio_descriptor,
233 phx2_ssd1_dxio_descriptor,
234 gbe_dxio_descriptor,
235 sd_dxio_descriptor,
236#if CONFIG(WLAN0_WWAN0) || CONFIG(WWAN01)
237 wwan_dxio_descriptor,
238#endif
239#if CONFIG(WLAN0_WWAN0) || CONFIG(WLAN01)
240 wlan_dxio_descriptor,
241#endif
242 ssd0_dxio_descriptor,
243 };
244 *dxio_descs = birman_phx2_dxio_descriptors;
245 *dxio_num = ARRAY_SIZE(birman_phx2_dxio_descriptors);
246 }
247
Martin Roth3c963d92022-10-06 16:29:07 -0600248 *ddi_descs = birman_ddi_descriptors;
249 *ddi_num = ARRAY_SIZE(birman_ddi_descriptors);
250}