Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 9aebc19182971deb5dbade7b5e0c5e1f62ac718b / . / src / mainboard / amd / birman / port_descriptors.c
blob: 35dcf651e59f53746901f9dc1511286653492e95 [file] [log] [blame]
Martin Roth3c963d92022-10-06 16:29:07 -0600[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <console/console.h>
4#include <device/i2c_simple.h>
Elyes Haouas9aebc192023-01-30 20:02:03 +0100[diff] [blame^]5#include <gpio.h>
Martin Roth3c963d92022-10-06 16:29:07 -0600[diff] [blame]6#include <soc/platform_descriptors.h>
7#include <types.h>
8
9/* TODO: Update for birman */
10
11static const fsp_dxio_descriptor birman_dxio_descriptors[] = {
12 {
13 .engine_type = PCIE_ENGINE,
14 .port_present = true,
15 .start_logical_lane = 0,
16 .end_logical_lane = 0,
17 .device_number = 2,
18 .function_number = 1,
19 .link_speed_capability = GEN3,
20 .turn_off_unused_lanes = true,
21 .link_aspm = 2,
22 .link_hotplug = 3,
23 .clk_req = CLK_REQ3,
24 },
25 {
26 .engine_type = PCIE_ENGINE,
27 .port_present = true,
28 .start_logical_lane = 1,
29 .end_logical_lane = 1,
30 .device_number = 2,
31 .function_number = 2,
32 .link_speed_capability = GEN3,
33 .turn_off_unused_lanes = true,
34 .link_aspm = 2,
35 .link_hotplug = 3,
36 .clk_req = CLK_REQ1,
37 },
38 {
39 .engine_type = PCIE_ENGINE,
40 .port_present = true,
41 .start_logical_lane = 2,
42 .end_logical_lane = 3,
43 .device_number = 2,
44 .function_number = 3,
45 .link_speed_capability = GEN3,
46 .turn_off_unused_lanes = true,
47 .link_aspm = 2,
48 .link_hotplug = 3,
49 .gpio_group_id = GPIO_27,
50 .clk_req = CLK_REQ0,
51 },
52};
53
54static fsp_ddi_descriptor birman_ddi_descriptors[] = {
55 { /* DDI0 - eDP */
56 .connector_type = DDI_EDP,
57 .aux_index = DDI_AUX1,
58 .hdp_index = DDI_HDP1
59 },
60 { /* DDI1 - HDMI/DP */
61 .connector_type = DDI_HDMI,
62 .aux_index = DDI_AUX2,
63 .hdp_index = DDI_HDP2
64 },
65 { /* DDI2 - DP (type C) */
66 .connector_type = DDI_DP,
67 .aux_index = DDI_AUX3,
68 .hdp_index = DDI_HDP3,
69 },
70 { /* DDI3 - DP (type C) */
71 .connector_type = DDI_DP,
72 .aux_index = DDI_AUX4,
73 .hdp_index = DDI_HDP4,
74 },
75 { /* DDI4 - unused */
76 .connector_type = DDI_UNUSED_TYPE,
77 .aux_index = DDI_AUX5,
78 .hdp_index = DDI_HDP5,
79 }
80};
81
82static uint8_t get_ddi1_type(void)
83{
84 const uint8_t eeprom_i2c_bus = 2;
85 const uint8_t eeprom_i2c_address = 0x55;
86 const uint16_t eeprom_connector_type_offset = 2;
87 uint8_t eeprom_connector_type_data[2];
88 uint16_t connector_type;
89
90 if (i2c_2ba_read_bytes(eeprom_i2c_bus, eeprom_i2c_address,
91 eeprom_connector_type_offset, eeprom_connector_type_data,
92 sizeof(eeprom_connector_type_data))) {
93 printk(BIOS_NOTICE,
94 "Display connector type couldn't be determined. Disabling DDI1.\n");
95 return DDI_UNUSED_TYPE;
96 }
97
98 connector_type = eeprom_connector_type_data[1] | eeprom_connector_type_data[0] << 8;
99
100 switch (connector_type) {
101 case 0xc:
102 printk(BIOS_DEBUG, "Configuring DDI1 as HDMI.\n");
103 return DDI_HDMI;
104 break;
105 case 0x13:
106 printk(BIOS_DEBUG, "Configuring DDI1 as DP.\n");
107 return DDI_DP;
108 break;
109 case 0x14:
110 printk(BIOS_DEBUG, "Configuring DDI1 as eDP.\n");
111 return DDI_EDP;
112 break;
113 default:
114 printk(BIOS_WARNING, "Unexpected display connector type %x. Disabling DDI1.\n",
115 connector_type);
116 return DDI_UNUSED_TYPE;
117 }
118}
119
120void mainboard_get_dxio_ddi_descriptors(
121 const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
122 const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
123{
124 birman_ddi_descriptors[1].connector_type = get_ddi1_type();
125
126 *dxio_descs = birman_dxio_descriptors;
127 *dxio_num = ARRAY_SIZE(birman_dxio_descriptors);
128 *ddi_descs = birman_ddi_descriptors;
129 *ddi_num = ARRAY_SIZE(birman_ddi_descriptors);
130}