Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 3 | |
| 4 | #include "hostbridge.asl" |
| 5 | #include "../iomap.h" |
Elyes HAOUAS | 4ec67fc | 2019-10-30 12:39:17 +0100 | [diff] [blame] | 6 | #include <southbridge/intel/common/rcba.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 7 | |
| 8 | /* PCI Device Resource Consumption */ |
| 9 | Device (PDRC) |
| 10 | { |
| 11 | Name (_HID, EISAID("PNP0C02")) |
| 12 | Name (_UID, 1) |
| 13 | |
| 14 | /* This does not seem to work correctly yet - set values statically for |
| 15 | * now. |
| 16 | */ |
| 17 | |
| 18 | Name (PDRS, ResourceTemplate() { |
Elyes HAOUAS | 4ec67fc | 2019-10-30 12:39:17 +0100 | [diff] [blame] | 19 | Memory32Fixed(ReadWrite, DEFAULT_RCBA, 0x00004000) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 20 | Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) |
| 21 | Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) |
| 22 | Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) |
Kyösti Mälkki | 503d324 | 2019-03-05 07:54:28 +0200 | [diff] [blame] | 23 | Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x10000000) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 24 | Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) /* Misc ICH */ |
| 25 | Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) /* Misc ICH */ |
| 26 | Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) /* Misc ICH */ |
| 27 | }) |
| 28 | |
| 29 | /* Current Resource Settings */ |
| 30 | Method (_CRS, 0, Serialized) |
| 31 | { |
| 32 | Return(PDRS) |
| 33 | } |
| 34 | } |
| 35 | |
| 36 | // PCIe graphics port 0:1.0 |
| 37 | #include "peg.asl" |