Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include "hostbridge.asl" |
| 18 | #include "../iomap.h" |
Elyes HAOUAS | 4ec67fc | 2019-10-30 12:39:17 +0100 | [diff] [blame^] | 19 | #include <southbridge/intel/common/rcba.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 20 | |
| 21 | /* PCI Device Resource Consumption */ |
| 22 | Device (PDRC) |
| 23 | { |
| 24 | Name (_HID, EISAID("PNP0C02")) |
| 25 | Name (_UID, 1) |
| 26 | |
| 27 | /* This does not seem to work correctly yet - set values statically for |
| 28 | * now. |
| 29 | */ |
| 30 | |
| 31 | Name (PDRS, ResourceTemplate() { |
Elyes HAOUAS | 4ec67fc | 2019-10-30 12:39:17 +0100 | [diff] [blame^] | 32 | Memory32Fixed(ReadWrite, DEFAULT_RCBA, 0x00004000) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 33 | Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) |
| 34 | Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) |
| 35 | Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) |
Kyösti Mälkki | 503d324 | 2019-03-05 07:54:28 +0200 | [diff] [blame] | 36 | Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x10000000) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 37 | Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) /* Misc ICH */ |
| 38 | Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) /* Misc ICH */ |
| 39 | Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) /* Misc ICH */ |
| 40 | }) |
| 41 | |
| 42 | /* Current Resource Settings */ |
| 43 | Method (_CRS, 0, Serialized) |
| 44 | { |
| 45 | Return(PDRS) |
| 46 | } |
| 47 | } |
| 48 | |
| 49 | // PCIe graphics port 0:1.0 |
| 50 | #include "peg.asl" |