| Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
| Martin Roth | 5474eb1 | 2018-05-26 19:22:33 -0600 | [diff] [blame] | 3 | |
| Vladimir Serbinenko | 0f9aa1c | 2015-05-29 16:52:50 +0200 | [diff] [blame] | 4 | #define __SIMPLE_DEVICE__ |
| 5 | |
| 6 | #include <types.h> |
| Vladimir Serbinenko | 0f9aa1c | 2015-05-29 16:52:50 +0200 | [diff] [blame] | 7 | #include <device/device.h> |
| Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 8 | #include <device/pci_ops.h> |
| Angel Pons | 95de231 | 2020-02-17 13:08:53 +0100 | [diff] [blame] | 9 | #include "ironlake.h" |
| Vladimir Serbinenko | 0f9aa1c | 2015-05-29 16:52:50 +0200 | [diff] [blame] | 10 | |
| Kyösti Mälkki | f091f4d | 2019-08-14 03:49:21 +0300 | [diff] [blame] | 11 | #include <cpu/intel/smm_reloc.h> |
| Vladimir Serbinenko | 0f9aa1c | 2015-05-29 16:52:50 +0200 | [diff] [blame] | 12 | |
| 13 | void northbridge_write_smram(u8 smram) |
| 14 | { |
| Kyösti Mälkki | d45114f | 2013-07-26 08:53:59 +0300 | [diff] [blame] | 15 | pci_write_config8(PCI_DEV(QUICKPATH_BUS, 0, 1), QPD0F1_SMRAM, smram); |
| Vladimir Serbinenko | 0f9aa1c | 2015-05-29 16:52:50 +0200 | [diff] [blame] | 16 | } |